1 From b1e679aba75e5e137c70bc76169c34835ef0e474 Mon Sep 17 00:00:00 2001
2 From: Laurentiu Tudor <laurentiu.tudor@nxp.com>
3 Date: Tue, 24 Jul 2018 13:11:03 +0300
4 Subject: [PATCH] arm64: dts: ls104x: make dma-coherent global to the SoC
6 These SoCs are really completely dma coherent in their entirety so add
7 the dma-coherent property at the soc level in the device tree and drop
8 the instances where it's specifically added to a few select devices.
10 Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
12 arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 5 +----
13 arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 1 +
14 2 files changed, 2 insertions(+), 4 deletions(-)
16 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
17 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
21 dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
24 clockgen: clocking@1ee1000 {
25 compatible = "fsl,ls1043a-clockgen";
27 reg-names = "ahci", "sata-ecc";
28 interrupts = <0 69 0x4>;
29 clocks = <&clockgen 4 0>;
33 msi1: msi-controller1@1571000 {
39 iommu-map = <0 &smmu 0 1>; /* update by bootloader */
41 bus-range = <0x0 0xff>;
47 iommu-map = <0 &smmu 0 1>; /* update by bootloader */
49 bus-range = <0x0 0xff>;
55 iommu-map = <0 &smmu 0 1>; /* update by bootloader */
57 bus-range = <0x0 0xff>;
58 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
59 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
63 dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
66 ddr: memory-controller@1080000 {
67 compatible = "fsl,qoriq-memory-controller";