git.openwrt.org Git - openwrt/staging/ansuel.git/blob

   1 From f8fc363bf0c023e4736a0328174b4a24b44ab23a Mon Sep 17 00:00:00 2001
   2 From: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
   3 Date: Thu, 27 Oct 2022 14:10:37 +0100
   4 Subject: [PATCH 06/21] net: phylink: add phylink_get_link_timer_ns() helper
   5
   6 Add a helper to convert the PHY interface mode to the required link
   7 timer setting as stated by the appropriate standard. Inappropriate
   8 interface modes return an error.
   9
  10 Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
  11 Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  12 ---
  13  include/linux/phylink.h | 24 ++++++++++++++++++++++++
  14  1 file changed, 24 insertions(+)
  15
  16 --- a/include/linux/phylink.h
  17 +++ b/include/linux/phylink.h
  18 @@ -617,6 +617,30 @@ int phylink_speed_up(struct phylink *pl)
  19
  20  void phylink_set_port_modes(unsigned long *bits);
  21
  22 +/**
  23 + * phylink_get_link_timer_ns - return the PCS link timer value
  24 + * @interface: link &typedef phy_interface_t mode
  25 + *
  26 + * Return the PCS link timer setting in nanoseconds for the PHY @interface
  27 + * mode, or -EINVAL if not appropriate.
  28 + */
  29 +static inline int phylink_get_link_timer_ns(phy_interface_t interface)
  30 +{
  31 +       switch (interface) {
  32 +       case PHY_INTERFACE_MODE_SGMII:
  33 +       case PHY_INTERFACE_MODE_QSGMII:
  34 +       case PHY_INTERFACE_MODE_USXGMII:
  35 +               return 1600000;
  36 +
  37 +       case PHY_INTERFACE_MODE_1000BASEX:
  38 +       case PHY_INTERFACE_MODE_2500BASEX:
  39 +               return 10000000;
  40 +
  41 +       default:
  42 +               return -EINVAL;
  43 +       }
  44 +}
  45 +
  46  void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state,
  47                                       u16 bmsr, u16 lpa);
  48  void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs,