c162fc734812eaa2527b4d30a15bd268822b55df
[openwrt/staging/blogic.git] /
1 From cb28f702960695e26597c332b0e46776e825cc34 Mon Sep 17 00:00:00 2001
2 From: Robert Marko <robimarko@gmail.com>
3 Date: Wed, 28 Feb 2024 18:24:10 +0100
4 Subject: [PATCH 2/2] net: phy: qcom: qca808x: fill in possible_interfaces
5
6 Currently QCA808x driver does not fill the possible_interfaces.
7 2.5G QCA808x support SGMII and 2500Base-X while 1G model only supports
8 SGMII, so fill the possible_interfaces accordingly.
9
10 Signed-off-by: Robert Marko <robimarko@gmail.com>
11 Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
12 Signed-off-by: David S. Miller <davem@davemloft.net>
13 ---
14 drivers/net/phy/qcom/qca808x.c | 12 ++++++++++++
15 1 file changed, 12 insertions(+)
16
17 --- a/drivers/net/phy/qcom/qca808x.c
18 +++ b/drivers/net/phy/qcom/qca808x.c
19 @@ -167,6 +167,16 @@ static bool qca808x_is_1g_only(struct ph
20 return !!(QCA808X_PHY_CHIP_TYPE_1G & ret);
21 }
22
23 +static void qca808x_fill_possible_interfaces(struct phy_device *phydev)
24 +{
25 + unsigned long *possible = phydev->possible_interfaces;
26 +
27 + __set_bit(PHY_INTERFACE_MODE_SGMII, possible);
28 +
29 + if (!qca808x_is_1g_only(phydev))
30 + __set_bit(PHY_INTERFACE_MODE_2500BASEX, possible);
31 +}
32 +
33 static int qca808x_probe(struct phy_device *phydev)
34 {
35 struct device *dev = &phydev->mdio.dev;
36 @@ -231,6 +241,8 @@ static int qca808x_config_init(struct ph
37 }
38 }
39
40 + qca808x_fill_possible_interfaces(phydev);
41 +
42 /* Configure adc threshold as 100mv for the link 10M */
43 return at803x_debug_reg_mask(phydev, QCA808X_PHY_DEBUG_ADC_THRESHOLD,
44 QCA808X_ADC_THRESHOLD_MASK,