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1 From d3feb406733544dbf0e239ef945a09decdceac88 Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
3 Date: Thu, 14 Apr 2016 11:37:43 +0200
4 Subject: [PATCH] phy: bcm-ns-usb2: new driver for USB 2.0 PHY on Northstar
5 MIME-Version: 1.0
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
8
9 Northstar is a family of SoCs used in home routers. They have USB 2.0
10 and 3.0 controllers with PHYs that need to be properly initialized.
11 This driver provides PHY init support in a generic way and can be bound
12 with an EHCI controller driver.
13 There are (just a few) registers being defined in bcma header. It's
14 because DMU/CRU registers will be also needed in other drivers. We will
15 need them e.g. in PCIe controller/PHY driver and at some point probably
16 in clock driver for BCM53573 chipset. By using include/linux/bcma/ we
17 avoid code duplication.
18
19 Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
20 Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
21 ---
22 .../devicetree/bindings/phy/bcm-ns-usb2-phy.txt | 21 ++++
23 drivers/phy/Kconfig | 9 ++
24 drivers/phy/Makefile | 1 +
25 drivers/phy/phy-bcm-ns-usb2.c | 137 +++++++++++++++++++++
26 include/linux/bcma/bcma.h | 1 +
27 include/linux/bcma/bcma_driver_arm_c9.h | 15 +++
28 6 files changed, 184 insertions(+)
29 create mode 100644 Documentation/devicetree/bindings/phy/bcm-ns-usb2-phy.txt
30 create mode 100644 drivers/phy/phy-bcm-ns-usb2.c
31 create mode 100644 include/linux/bcma/bcma_driver_arm_c9.h
32
33 --- /dev/null
34 +++ b/Documentation/devicetree/bindings/phy/bcm-ns-usb2-phy.txt
35 @@ -0,0 +1,21 @@
36 +Driver for Broadcom Northstar USB 2.0 PHY
37 +
38 +Required properties:
39 +- compatible: brcm,ns-usb2-phy
40 +- reg: iomem address range of DMU (Device Management Unit)
41 +- reg-names: "dmu", the only needed & supported reg right now
42 +- clocks: USB PHY reference clock
43 +- clock-names: "phy-ref-clk", the only needed & supported clock right now
44 +
45 +To initialize USB 2.0 PHY driver needs to setup PLL correctly. To do this it
46 +requires passing phandle to the USB PHY reference clock.
47 +
48 +Example:
49 + usb2-phy {
50 + compatible = "brcm,ns-usb2-phy";
51 + reg = <0x1800c000 0x1000>;
52 + reg-names = "dmu";
53 + #phy-cells = <0>;
54 + clocks = <&genpll BCM_NSP_GENPLL_USB_PHY_REF_CLK>;
55 + clock-names = "phy-ref-clk";
56 + };
57 --- a/drivers/phy/Kconfig
58 +++ b/drivers/phy/Kconfig
59 @@ -15,6 +15,15 @@ config GENERIC_PHY
60 phy users can obtain reference to the PHY. All the users of this
61 framework should select this config.
62
63 +config PHY_BCM_NS_USB2
64 + tristate "Broadcom Northstar USB 2.0 PHY Driver"
65 + depends on ARCH_BCM_IPROC || COMPILE_TEST
66 + depends on HAS_IOMEM && OF
67 + select GENERIC_PHY
68 + help
69 + Enable this to support Broadcom USB 2.0 PHY connected to the USB
70 + controller on Northstar family.
71 +
72 config PHY_BERLIN_USB
73 tristate "Marvell Berlin USB PHY Driver"
74 depends on ARCH_BERLIN && RESET_CONTROLLER && HAS_IOMEM && OF
75 --- a/drivers/phy/Makefile
76 +++ b/drivers/phy/Makefile
77 @@ -3,6 +3,7 @@
78 #
79
80 obj-$(CONFIG_GENERIC_PHY) += phy-core.o
81 +obj-$(CONFIG_PHY_BCM_NS_USB2) += phy-bcm-ns-usb2.o
82 obj-$(CONFIG_PHY_BERLIN_USB) += phy-berlin-usb.o
83 obj-$(CONFIG_PHY_BERLIN_SATA) += phy-berlin-sata.o
84 obj-$(CONFIG_PHY_DM816X_USB) += phy-dm816x-usb.o
85 --- /dev/null
86 +++ b/drivers/phy/phy-bcm-ns-usb2.c
87 @@ -0,0 +1,137 @@
88 +/*
89 + * Broadcom Northstar USB 2.0 PHY Driver
90 + *
91 + * Copyright (C) 2016 Rafał Miłecki <zajec5@gmail.com>
92 + *
93 + * This program is free software; you can redistribute it and/or modify
94 + * it under the terms of the GNU General Public License version 2 as
95 + * published by the Free Software Foundation.
96 + *
97 + */
98 +
99 +#include <linux/bcma/bcma.h>
100 +#include <linux/clk.h>
101 +#include <linux/delay.h>
102 +#include <linux/err.h>
103 +#include <linux/module.h>
104 +#include <linux/of_address.h>
105 +#include <linux/of_platform.h>
106 +#include <linux/phy/phy.h>
107 +#include <linux/platform_device.h>
108 +#include <linux/slab.h>
109 +
110 +struct bcm_ns_usb2 {
111 + struct device *dev;
112 + struct clk *ref_clk;
113 + struct phy *phy;
114 + void __iomem *dmu;
115 +};
116 +
117 +static int bcm_ns_usb2_phy_init(struct phy *phy)
118 +{
119 + struct bcm_ns_usb2 *usb2 = phy_get_drvdata(phy);
120 + struct device *dev = usb2->dev;
121 + void __iomem *dmu = usb2->dmu;
122 + u32 ref_clk_rate, usb2ctl, usb_pll_ndiv, usb_pll_pdiv;
123 + int err = 0;
124 +
125 + err = clk_prepare_enable(usb2->ref_clk);
126 + if (err < 0) {
127 + dev_err(dev, "Failed to prepare ref clock: %d\n", err);
128 + goto err_out;
129 + }
130 +
131 + ref_clk_rate = clk_get_rate(usb2->ref_clk);
132 + if (!ref_clk_rate) {
133 + dev_err(dev, "Failed to get ref clock rate\n");
134 + err = -EINVAL;
135 + goto err_clk_off;
136 + }
137 +
138 + usb2ctl = readl(dmu + BCMA_DMU_CRU_USB2_CONTROL);
139 +
140 + if (usb2ctl & BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_PDIV_MASK) {
141 + usb_pll_pdiv = usb2ctl;
142 + usb_pll_pdiv &= BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_PDIV_MASK;
143 + usb_pll_pdiv >>= BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_PDIV_SHIFT;
144 + } else {
145 + usb_pll_pdiv = 1 << 3;
146 + }
147 +
148 + /* Calculate ndiv based on a solid 1920 MHz that is for USB2 PHY */
149 + usb_pll_ndiv = (1920000000 * usb_pll_pdiv) / ref_clk_rate;
150 +
151 + /* Unlock DMU PLL settings with some magic value */
152 + writel(0x0000ea68, dmu + BCMA_DMU_CRU_CLKSET_KEY);
153 +
154 + /* Write USB 2.0 PLL control setting */
155 + usb2ctl &= ~BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_NDIV_MASK;
156 + usb2ctl |= usb_pll_ndiv << BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_NDIV_SHIFT;
157 + writel(usb2ctl, dmu + BCMA_DMU_CRU_USB2_CONTROL);
158 +
159 + /* Lock DMU PLL settings */
160 + writel(0x00000000, dmu + BCMA_DMU_CRU_CLKSET_KEY);
161 +
162 +err_clk_off:
163 + clk_disable_unprepare(usb2->ref_clk);
164 +err_out:
165 + return err;
166 +}
167 +
168 +static const struct phy_ops ops = {
169 + .init = bcm_ns_usb2_phy_init,
170 + .owner = THIS_MODULE,
171 +};
172 +
173 +static int bcm_ns_usb2_probe(struct platform_device *pdev)
174 +{
175 + struct device *dev = &pdev->dev;
176 + struct bcm_ns_usb2 *usb2;
177 + struct resource *res;
178 + struct phy_provider *phy_provider;
179 +
180 + usb2 = devm_kzalloc(&pdev->dev, sizeof(*usb2), GFP_KERNEL);
181 + if (!usb2)
182 + return -ENOMEM;
183 + usb2->dev = dev;
184 +
185 + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dmu");
186 + usb2->dmu = devm_ioremap_resource(dev, res);
187 + if (IS_ERR(usb2->dmu)) {
188 + dev_err(dev, "Failed to map DMU regs\n");
189 + return PTR_ERR(usb2->dmu);
190 + }
191 +
192 + usb2->ref_clk = devm_clk_get(dev, "phy-ref-clk");
193 + if (IS_ERR(usb2->ref_clk)) {
194 + dev_err(dev, "Clock not defined\n");
195 + return PTR_ERR(usb2->ref_clk);
196 + }
197 +
198 + usb2->phy = devm_phy_create(dev, NULL, &ops);
199 + if (IS_ERR(dev))
200 + return PTR_ERR(dev);
201 +
202 + phy_set_drvdata(usb2->phy, usb2);
203 + platform_set_drvdata(pdev, usb2);
204 +
205 + phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
206 + return PTR_ERR_OR_ZERO(phy_provider);
207 +}
208 +
209 +static const struct of_device_id bcm_ns_usb2_id_table[] = {
210 + { .compatible = "brcm,ns-usb2-phy", },
211 + {},
212 +};
213 +MODULE_DEVICE_TABLE(of, bcm_ns_usb2_id_table);
214 +
215 +static struct platform_driver bcm_ns_usb2_driver = {
216 + .probe = bcm_ns_usb2_probe,
217 + .driver = {
218 + .name = "bcm_ns_usb2",
219 + .of_match_table = bcm_ns_usb2_id_table,
220 + },
221 +};
222 +module_platform_driver(bcm_ns_usb2_driver);
223 +
224 +MODULE_LICENSE("GPL v2");
225 --- a/include/linux/bcma/bcma.h
226 +++ b/include/linux/bcma/bcma.h
227 @@ -4,6 +4,7 @@
228 #include <linux/pci.h>
229 #include <linux/mod_devicetable.h>
230
231 +#include <linux/bcma/bcma_driver_arm_c9.h>
232 #include <linux/bcma/bcma_driver_chipcommon.h>
233 #include <linux/bcma/bcma_driver_pci.h>
234 #include <linux/bcma/bcma_driver_pcie2.h>
235 --- /dev/null
236 +++ b/include/linux/bcma/bcma_driver_arm_c9.h
237 @@ -0,0 +1,15 @@
238 +#ifndef LINUX_BCMA_DRIVER_ARM_C9_H_
239 +#define LINUX_BCMA_DRIVER_ARM_C9_H_
240 +
241 +/* DMU (Device Management Unit) */
242 +#define BCMA_DMU_CRU_USB2_CONTROL 0x0164
243 +#define BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_NDIV_MASK 0x00000FFC
244 +#define BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_NDIV_SHIFT 2
245 +#define BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_PDIV_MASK 0x00007000
246 +#define BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_PDIV_SHIFT 12
247 +#define BCMA_DMU_CRU_CLKSET_KEY 0x0180
248 +#define BCMA_DMU_CRU_STRAPS_CTRL 0x02A0
249 +#define BCMA_DMU_CRU_STRAPS_CTRL_USB3 0x00000010
250 +#define BCMA_DMU_CRU_STRAPS_CTRL_4BYTE 0x00008000
251 +
252 +#endif /* LINUX_BCMA_DRIVER_ARM_C9_H_ */
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