git.openwrt.org Git - openwrt/staging/stintel.git/blob

   1 From d145ff5ff4c35bf00a84c7f916165150d0a75e53 Mon Sep 17 00:00:00 2001
   2 From: Maxime Ripard <maxime@cerno.tech>
   3 Date: Thu, 19 Aug 2021 15:59:29 +0200
   4 Subject: [PATCH] drm/vc4: hdmi: Split the CEC disable / enable
   5  functions in two
   6
   7 In order to ease further additions to the CEC enable and disable, let's
   8 split the function into two functions, one to enable and the other to
   9 disable.
  10
  11 Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
  12 Signed-off-by: Maxime Ripard <maxime@cerno.tech>
  13 Link: https://patchwork.freedesktop.org/patch/msgid/20210819135931.895976-5-maxime@cerno.tech
  14 ---
  15  drivers/gpu/drm/vc4/vc4_hdmi.c | 75 ++++++++++++++++++++--------------
  16  1 file changed, 45 insertions(+), 30 deletions(-)
  17
  18 --- a/drivers/gpu/drm/vc4/vc4_hdmi.c
  19 +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
  20 @@ -1748,7 +1748,7 @@ static irqreturn_t vc4_cec_irq_handler(i
  21         return ret;
  22  }
  23
  24 -static int vc4_hdmi_cec_adap_enable(struct cec_adapter *adap, bool enable)
  25 +static int vc4_hdmi_cec_enable(struct cec_adapter *adap)
  26  {
  27         struct vc4_hdmi *vc4_hdmi = cec_get_drvdata(adap);
  28         /* clock period in microseconds */
  29 @@ -1761,38 +1761,53 @@ static int vc4_hdmi_cec_adap_enable(stru
  30         val |= ((4700 / usecs) << VC4_HDMI_CEC_CNT_TO_4700_US_SHIFT) |
  31                ((4500 / usecs) << VC4_HDMI_CEC_CNT_TO_4500_US_SHIFT);
  32
  33 -       if (enable) {
  34 -               HDMI_WRITE(HDMI_CEC_CNTRL_5, val |
  35 -                          VC4_HDMI_CEC_TX_SW_RESET | VC4_HDMI_CEC_RX_SW_RESET);
  36 -               HDMI_WRITE(HDMI_CEC_CNTRL_5, val);
  37 -               HDMI_WRITE(HDMI_CEC_CNTRL_2,
  38 -                          ((1500 / usecs) << VC4_HDMI_CEC_CNT_TO_1500_US_SHIFT) |
  39 -                          ((1300 / usecs) << VC4_HDMI_CEC_CNT_TO_1300_US_SHIFT) |
  40 -                          ((800 / usecs) << VC4_HDMI_CEC_CNT_TO_800_US_SHIFT) |
  41 -                          ((600 / usecs) << VC4_HDMI_CEC_CNT_TO_600_US_SHIFT) |
  42 -                          ((400 / usecs) << VC4_HDMI_CEC_CNT_TO_400_US_SHIFT));
  43 -               HDMI_WRITE(HDMI_CEC_CNTRL_3,
  44 -                          ((2750 / usecs) << VC4_HDMI_CEC_CNT_TO_2750_US_SHIFT) |
  45 -                          ((2400 / usecs) << VC4_HDMI_CEC_CNT_TO_2400_US_SHIFT) |
  46 -                          ((2050 / usecs) << VC4_HDMI_CEC_CNT_TO_2050_US_SHIFT) |
  47 -                          ((1700 / usecs) << VC4_HDMI_CEC_CNT_TO_1700_US_SHIFT));
  48 -               HDMI_WRITE(HDMI_CEC_CNTRL_4,
  49 -                          ((4300 / usecs) << VC4_HDMI_CEC_CNT_TO_4300_US_SHIFT) |
  50 -                          ((3900 / usecs) << VC4_HDMI_CEC_CNT_TO_3900_US_SHIFT) |
  51 -                          ((3600 / usecs) << VC4_HDMI_CEC_CNT_TO_3600_US_SHIFT) |
  52 -                          ((3500 / usecs) << VC4_HDMI_CEC_CNT_TO_3500_US_SHIFT));
  53 -
  54 -               if (!vc4_hdmi->variant->external_irq_controller)
  55 -                       HDMI_WRITE(HDMI_CEC_CPU_MASK_CLEAR, VC4_HDMI_CPU_CEC);
  56 -       } else {
  57 -               if (!vc4_hdmi->variant->external_irq_controller)
  58 -                       HDMI_WRITE(HDMI_CEC_CPU_MASK_SET, VC4_HDMI_CPU_CEC);
  59 -               HDMI_WRITE(HDMI_CEC_CNTRL_5, val |
  60 -                          VC4_HDMI_CEC_TX_SW_RESET | VC4_HDMI_CEC_RX_SW_RESET);
  61 -       }
  62 +       HDMI_WRITE(HDMI_CEC_CNTRL_5, val |
  63 +                  VC4_HDMI_CEC_TX_SW_RESET | VC4_HDMI_CEC_RX_SW_RESET);
  64 +       HDMI_WRITE(HDMI_CEC_CNTRL_5, val);
  65 +       HDMI_WRITE(HDMI_CEC_CNTRL_2,
  66 +                  ((1500 / usecs) << VC4_HDMI_CEC_CNT_TO_1500_US_SHIFT) |
  67 +                  ((1300 / usecs) << VC4_HDMI_CEC_CNT_TO_1300_US_SHIFT) |
  68 +                  ((800 / usecs) << VC4_HDMI_CEC_CNT_TO_800_US_SHIFT) |
  69 +                  ((600 / usecs) << VC4_HDMI_CEC_CNT_TO_600_US_SHIFT) |
  70 +                  ((400 / usecs) << VC4_HDMI_CEC_CNT_TO_400_US_SHIFT));
  71 +       HDMI_WRITE(HDMI_CEC_CNTRL_3,
  72 +                  ((2750 / usecs) << VC4_HDMI_CEC_CNT_TO_2750_US_SHIFT) |
  73 +                  ((2400 / usecs) << VC4_HDMI_CEC_CNT_TO_2400_US_SHIFT) |
  74 +                  ((2050 / usecs) << VC4_HDMI_CEC_CNT_TO_2050_US_SHIFT) |
  75 +                  ((1700 / usecs) << VC4_HDMI_CEC_CNT_TO_1700_US_SHIFT));
  76 +       HDMI_WRITE(HDMI_CEC_CNTRL_4,
  77 +                  ((4300 / usecs) << VC4_HDMI_CEC_CNT_TO_4300_US_SHIFT) |
  78 +                  ((3900 / usecs) << VC4_HDMI_CEC_CNT_TO_3900_US_SHIFT) |
  79 +                  ((3600 / usecs) << VC4_HDMI_CEC_CNT_TO_3600_US_SHIFT) |
  80 +                  ((3500 / usecs) << VC4_HDMI_CEC_CNT_TO_3500_US_SHIFT));
  81 +
  82 +       if (!vc4_hdmi->variant->external_irq_controller)
  83 +               HDMI_WRITE(HDMI_CEC_CPU_MASK_CLEAR, VC4_HDMI_CPU_CEC);
  84 +
  85         return 0;
  86  }
  87
  88 +static int vc4_hdmi_cec_disable(struct cec_adapter *adap)
  89 +{
  90 +       struct vc4_hdmi *vc4_hdmi = cec_get_drvdata(adap);
  91 +
  92 +       if (!vc4_hdmi->variant->external_irq_controller)
  93 +               HDMI_WRITE(HDMI_CEC_CPU_MASK_SET, VC4_HDMI_CPU_CEC);
  94 +
  95 +       HDMI_WRITE(HDMI_CEC_CNTRL_5, HDMI_READ(HDMI_CEC_CNTRL_5) |
  96 +                  VC4_HDMI_CEC_TX_SW_RESET | VC4_HDMI_CEC_RX_SW_RESET);
  97 +
  98 +       return 0;
  99 +}
 100 +
 101 +static int vc4_hdmi_cec_adap_enable(struct cec_adapter *adap, bool enable)
 102 +{
 103 +       if (enable)
 104 +               return vc4_hdmi_cec_enable(adap);
 105 +       else
 106 +               return vc4_hdmi_cec_disable(adap);
 107 +}
 108 +
 109  static int vc4_hdmi_cec_adap_log_addr(struct cec_adapter *adap, u8 log_addr)
 110  {
 111         struct vc4_hdmi *vc4_hdmi = cec_get_drvdata(adap);