b98f2daa6764e7ab83c2d6ebed116acd03edfbcd
[openwrt/staging/xback.git] /
1 From 916553449561c4f0b61c71b751b7bb583f5dddd4 Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
3 Date: Wed, 3 May 2023 14:16:11 +0200
4 Subject: [PATCH] ARM: dts: BCM5301X: Relicense Florian's code to the GPL 2.0+
5 / MIT
6 MIME-Version: 1.0
7 Content-Type: text/plain; charset=UTF-8
8 Content-Transfer-Encoding: 8bit
9
10 All BCM5301X device DTS files use dual licensing. Try the same for SoC.
11
12 Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
13 Link: https://lore.kernel.org/r/20230503121611.1629-2-zajec5@gmail.com
14 Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
15 ---
16 arch/arm/boot/dts/bcm-ns.dtsi | 36 ++++++++++++++++++++++++++++++
17 arch/arm/boot/dts/bcm5301x.dtsi | 39 ---------------------------------
18 2 files changed, 36 insertions(+), 39 deletions(-)
19
20 --- a/arch/arm/boot/dts/bcm-ns.dtsi
21 +++ b/arch/arm/boot/dts/bcm-ns.dtsi
22 @@ -19,6 +19,8 @@
23
24 gpio-controller;
25 #gpio-cells = <2>;
26 + interrupt-controller;
27 + #interrupt-cells = <2>;
28 };
29
30 pcie0: pcie@12000 {
31 @@ -109,6 +111,22 @@
32 };
33 };
34 };
35 +
36 + gmac0: ethernet@24000 {
37 + reg = <0x24000 0x800>;
38 + };
39 +
40 + gmac1: ethernet@25000 {
41 + reg = <0x25000 0x800>;
42 + };
43 +
44 + gmac2: ethernet@26000 {
45 + reg = <0x26000 0x800>;
46 + };
47 +
48 + gmac3: ethernet@27000 {
49 + reg = <0x27000 0x800>;
50 + };
51 };
52
53 mdio: mdio@18003000 {
54 @@ -118,6 +136,24 @@
55 #address-cells = <1>;
56 };
57
58 + rng: rng@18004000 {
59 + compatible = "brcm,bcm5301x-rng";
60 + reg = <0x18004000 0x14>;
61 + };
62 +
63 + srab: ethernet-switch@18007000 {
64 + compatible = "brcm,bcm53011-srab", "brcm,bcm5301x-srab";
65 + reg = <0x18007000 0x1000>;
66 +
67 + status = "disabled";
68 +
69 + /* ports are defined in board DTS */
70 + ports {
71 + #address-cells = <1>;
72 + #size-cells = <0>;
73 + };
74 + };
75 +
76 dmu-bus@1800c000 {
77 compatible = "simple-bus";
78 ranges = <0 0x1800c000 0x1000>;
79 --- a/arch/arm/boot/dts/bcm5301x.dtsi
80 +++ b/arch/arm/boot/dts/bcm5301x.dtsi
81 @@ -218,30 +218,9 @@
82 <0x00028000 6 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
83 <0x00028000 7 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
84
85 - chipcommon@0 {
86 - interrupt-controller;
87 - #interrupt-cells = <2>;
88 - };
89 -
90 pcie2: pcie@14000 {
91 reg = <0x00014000 0x1000>;
92 };
93 -
94 - gmac0: ethernet@24000 {
95 - reg = <0x24000 0x800>;
96 - };
97 -
98 - gmac1: ethernet@25000 {
99 - reg = <0x25000 0x800>;
100 - };
101 -
102 - gmac2: ethernet@26000 {
103 - reg = <0x26000 0x800>;
104 - };
105 -
106 - gmac3: ethernet@27000 {
107 - reg = <0x27000 0x800>;
108 - };
109 };
110
111 pwm: pwm@18002000 {
112 @@ -322,24 +301,6 @@
113 };
114 };
115
116 - srab: ethernet-switch@18007000 {
117 - compatible = "brcm,bcm53011-srab", "brcm,bcm5301x-srab";
118 - reg = <0x18007000 0x1000>;
119 -
120 - status = "disabled";
121 -
122 - /* ports are defined in board DTS */
123 - ports {
124 - #address-cells = <1>;
125 - #size-cells = <0>;
126 - };
127 - };
128 -
129 - rng: rng@18004000 {
130 - compatible = "brcm,bcm5301x-rng";
131 - reg = <0x18004000 0x14>;
132 - };
133 -
134 nand_controller: nand-controller@18028000 {
135 compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand";
136 reg = <0x18028000 0x600>, <0x1811a408 0x600>, <0x18028f00 0x20>;