git.openwrt.org Git - openwrt/staging/stintel.git/blob

   1 From 5d0ab61a700214366dfcca5893b87655261e8c94 Mon Sep 17 00:00:00 2001
   2 From: Varadarajan Narayanan <quic_varada@quicinc.com>
   3 Date: Tue, 30 Apr 2024 12:12:14 +0530
   4 Subject: [PATCH] arm64: dts: qcom: ipq9574: Add icc provider ability to gcc
   5
   6 IPQ SoCs dont involve RPM in managing NoC related clocks and
   7 there is no NoC scaling. Linux itself handles these clocks.
   8 However, these should not be exposed as just clocks and align
   9 with other Qualcomm SoCs that handle these clocks from a
  10 interconnect provider.
  11
  12 Hence include icc provider capability to the gcc node so that
  13 peripherals can use the interconnect facility to enable these
  14 clocks.
  15
  16 Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
  17 Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
  18 Link: https://lore.kernel.org/r/20240430064214.2030013-7-quic_varada@quicinc.com
  19 Signed-off-by: Bjorn Andersson <andersson@kernel.org>
  20 ---
  21  arch/arm64/boot/dts/qcom/ipq9574.dtsi | 2 ++
  22  1 file changed, 2 insertions(+)
  23
  24 diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
  25 index 04ba09a9156c..48dfafea46a7 100644
  26 --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
  27 +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
  28 @@ -8,6 +8,7 @@
  29
  30  #include <dt-bindings/clock/qcom,apss-ipq.h>
  31  #include <dt-bindings/clock/qcom,ipq9574-gcc.h>
  32 +#include <dt-bindings/interconnect/qcom,ipq9574.h>
  33  #include <dt-bindings/interrupt-controller/arm-gic.h>
  34  #include <dt-bindings/reset/qcom,ipq9574-gcc.h>
  35  #include <dt-bindings/thermal/thermal.h>
  36 @@ -315,6 +316,7 @@ gcc: clock-controller@1800000 {
  37                                  <0>;
  38                         #clock-cells = <1>;
  39                         #reset-cells = <1>;
  40 +                       #interconnect-cells = <1>;
  41                 };
  42
  43                 tcsr_mutex: hwlock@1905000 {
  44 --
  45 2.45.2
  46