1 From e1c55c0ad21daafcb3551b4f5286c1e11c51acc3 Mon Sep 17 00:00:00 2001
2 From: Weijie Gao <weijie.gao@mediatek.com>
3 Date: Wed, 31 Aug 2022 19:04:51 +0800
4 Subject: [PATCH 19/32] dt-bindings: pinctrl: mediatek: add a header for common
7 This patch adds a pinctrl header for common pinconf parameters such as
8 pull-up/pull-down resistors and drive strengths.
10 Reviewed-by: Simon Glass <sjg@chromium.org>
11 Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
13 include/dt-bindings/pinctrl/mt65xx.h | 41 ++++++++++++++++++++++++++++
14 1 file changed, 41 insertions(+)
15 create mode 100644 include/dt-bindings/pinctrl/mt65xx.h
18 +++ b/include/dt-bindings/pinctrl/mt65xx.h
20 +/* SPDX-License-Identifier: GPL-2.0-only */
22 + * Copyright (c) 2022 MediaTek Inc.
23 + * Author: Hongzhou.Yang <hongzhou.yang@mediatek.com>
26 +#ifndef _DT_BINDINGS_PINCTRL_MT65XX_H
27 +#define _DT_BINDINGS_PINCTRL_MT65XX_H
29 +#define MTK_PIN_NO(x) ((x) << 8)
30 +#define MTK_GET_PIN_NO(x) ((x) >> 8)
31 +#define MTK_GET_PIN_FUNC(x) ((x) & 0xf)
33 +#define MTK_PUPD_SET_R1R0_00 100
34 +#define MTK_PUPD_SET_R1R0_01 101
35 +#define MTK_PUPD_SET_R1R0_10 102
36 +#define MTK_PUPD_SET_R1R0_11 103
38 +#define MTK_PULL_SET_RSEL_000 200
39 +#define MTK_PULL_SET_RSEL_001 201
40 +#define MTK_PULL_SET_RSEL_010 202
41 +#define MTK_PULL_SET_RSEL_011 203
42 +#define MTK_PULL_SET_RSEL_100 204
43 +#define MTK_PULL_SET_RSEL_101 205
44 +#define MTK_PULL_SET_RSEL_110 206
45 +#define MTK_PULL_SET_RSEL_111 207
47 +#define MTK_DRIVE_2mA 2
48 +#define MTK_DRIVE_4mA 4
49 +#define MTK_DRIVE_6mA 6
50 +#define MTK_DRIVE_8mA 8
51 +#define MTK_DRIVE_10mA 10
52 +#define MTK_DRIVE_12mA 12
53 +#define MTK_DRIVE_14mA 14
54 +#define MTK_DRIVE_16mA 16
55 +#define MTK_DRIVE_20mA 20
56 +#define MTK_DRIVE_24mA 24
57 +#define MTK_DRIVE_28mA 28
58 +#define MTK_DRIVE_32mA 32
60 +#endif /* _DT_BINDINGS_PINCTRL_MT65XX_H */