b3954d19b045a99bb6000018de5b11b675e261c6
[openwrt/staging/stintel.git] /
1 From 5b5b5806f22390808b8e8fa180fe35b003a4a74d Mon Sep 17 00:00:00 2001
2 From: Varadarajan Narayanan <quic_varada@quicinc.com>
3 Date: Tue, 31 Oct 2023 12:41:39 +0530
4 Subject: [PATCH 2/2] cpufreq: qcom-nvmem: Introduce cpufreq for ipq95xx
5
6 IPQ95xx SoCs have different OPPs available for the CPU based on
7 the SoC variant. This can be determined from an eFuse register
8 present in the silicon.
9
10 Added support for ipq95xx on nvmem driver which helps to
11 determine OPPs at runtime based on the eFuse register which
12 has the CPU frequency limits. opp-supported-hw dt binding
13 can be used to indicate the available OPPs for each limit.
14
15 Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
16 Signed-off-by: Praveenkumar I <ipkumar@codeaurora.org>
17 Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
18 Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
19 [ Viresh: Fixed subject ]
20 Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
21 ---
22 drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
23 drivers/cpufreq/qcom-cpufreq-nvmem.c | 6 ++++++
24 2 files changed, 7 insertions(+)
25
26 diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c
27 index 53da25589e5f..bd1e1357cef8 100644
28 --- a/drivers/cpufreq/cpufreq-dt-platdev.c
29 +++ b/drivers/cpufreq/cpufreq-dt-platdev.c
30 @@ -184,6 +184,7 @@ static const struct of_device_id blocklist[] __initconst = {
31
32 { .compatible = "qcom,ipq5332", },
33 { .compatible = "qcom,ipq8064", },
34 + { .compatible = "qcom,ipq9574", },
35 { .compatible = "qcom,apq8064", },
36 { .compatible = "qcom,msm8974", },
37 { .compatible = "qcom,msm8960", },
38 diff --git a/drivers/cpufreq/qcom-cpufreq-nvmem.c b/drivers/cpufreq/qcom-cpufreq-nvmem.c
39 index 4f7af70169e0..6355a39418c5 100644
40 --- a/drivers/cpufreq/qcom-cpufreq-nvmem.c
41 +++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c
42 @@ -188,6 +188,11 @@ static int qcom_cpufreq_kryo_name_version(struct device *cpu_dev,
43 case QCOM_ID_IPQ5312:
44 case QCOM_ID_IPQ5302:
45 case QCOM_ID_IPQ5300:
46 + case QCOM_ID_IPQ9514:
47 + case QCOM_ID_IPQ9550:
48 + case QCOM_ID_IPQ9554:
49 + case QCOM_ID_IPQ9570:
50 + case QCOM_ID_IPQ9574:
51 drv->versions = 1 << (unsigned int)(*speedbin);
52 break;
53 case QCOM_ID_MSM8996SG:
54 @@ -551,6 +556,7 @@ static const struct of_device_id qcom_cpufreq_match_list[] __initconst = {
55 { .compatible = "qcom,ipq5332", .data = &match_data_kryo },
56 { .compatible = "qcom,ipq8064", .data = &match_data_krait },
57 { .compatible = "qcom,apq8064", .data = &match_data_krait },
58 + { .compatible = "qcom,ipq9574", .data = &match_data_kryo },
59 { .compatible = "qcom,msm8974", .data = &match_data_krait },
60 { .compatible = "qcom,msm8960", .data = &match_data_krait },
61 {},
62 --
63 2.45.2
64