b1fa4825e581e67477d57b15e1c9fb98d89b231c
[openwrt/staging/ansuel.git] /
1 From 6729f3d6ace95770cfda201fd04fafcc2e46fd36 Mon Sep 17 00:00:00 2001
2 From: Dave Stevenson <dave.stevenson@raspberrypi.com>
3 Date: Mon, 7 Mar 2022 15:19:38 +0000
4 Subject: [PATCH] drm/vc4: hdmi: Add CSC for BT601/709/2020 limited and
5 full range output
6
7 The HVS always composes in the RGB domain, but there is a colourspace
8 conversion block on the output to allow for sending YCbCr over the
9 HDMI interface.
10 The colourspace on that link is configurable via the "Colorspace"
11 property on the connector, and that updates the infoframes. There
12 is also selection of limited or full range based on the mode selected
13 or an override.
14
15 Add code to update the CSC as well so that the metadata matches the
16 image data.
17
18 Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
19 ---
20 drivers/gpu/drm/vc4/vc4_hdmi.c | 196 ++++++++++++++++++++++++---------
21 1 file changed, 145 insertions(+), 51 deletions(-)
22
23 --- a/drivers/gpu/drm/vc4/vc4_hdmi.c
24 +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
25 @@ -158,8 +158,8 @@ static bool vc4_hdmi_mode_needs_scrambli
26 return clock > HDMI_14_MAX_TMDS_CLK;
27 }
28
29 -static bool vc4_hdmi_is_full_range_rgb(struct vc4_hdmi *vc4_hdmi,
30 - const struct drm_display_mode *mode)
31 +static bool vc4_hdmi_is_full_range(struct vc4_hdmi *vc4_hdmi,
32 + const struct drm_display_mode *mode)
33 {
34 struct drm_display_info *display = &vc4_hdmi->connector.display_info;
35
36 @@ -901,7 +901,7 @@ static void vc4_hdmi_set_avi_infoframe(s
37
38 drm_hdmi_avi_infoframe_quant_range(&frame.avi,
39 connector, mode,
40 - vc4_hdmi_is_full_range_rgb(vc4_hdmi, mode) ?
41 + vc4_hdmi_is_full_range(vc4_hdmi, mode) ?
42 HDMI_QUANTIZATION_RANGE_FULL :
43 HDMI_QUANTIZATION_RANGE_LIMITED);
44 drm_hdmi_avi_infoframe_colorimetry(&frame.avi, cstate);
45 @@ -1154,7 +1154,7 @@ static void vc4_hdmi_csc_setup(struct vc
46 csc_ctl = VC4_SET_FIELD(VC4_HD_CSC_CTL_ORDER_BGR,
47 VC4_HD_CSC_CTL_ORDER);
48
49 - if (!vc4_hdmi_is_full_range_rgb(vc4_hdmi, mode)) {
50 + if (!vc4_hdmi_is_full_range(vc4_hdmi, mode)) {
51 /* CEA VICs other than #1 requre limited range RGB
52 * output unless overridden by an AVI infoframe.
53 * Apply a colorspace conversion to squash 0-255 down
54 @@ -1193,15 +1193,6 @@ static void vc4_hdmi_csc_setup(struct vc
55 * [ 0 1 0 0]
56 * [ 0 0 1 0]
57 *
58 - * Matrix is signed 2p13 fixed point, with signed 9p6 offsets
59 - */
60 -static const u16 vc5_hdmi_csc_full_rgb_unity[3][4] = {
61 - { 0x2000, 0x0000, 0x0000, 0x0000 },
62 - { 0x0000, 0x2000, 0x0000, 0x0000 },
63 - { 0x0000, 0x0000, 0x2000, 0x0000 },
64 -};
65 -
66 -/*
67 * CEA VICs other than #1 require limited range RGB output unless
68 * overridden by an AVI infoframe. Apply a colorspace conversion to
69 * squash 0-255 down to 16-235. The matrix here is:
70 @@ -1212,43 +1203,105 @@ static const u16 vc5_hdmi_csc_full_rgb_u
71 *
72 * Matrix is signed 2p13 fixed point, with signed 9p6 offsets
73 */
74 -static const u16 vc5_hdmi_csc_full_rgb_to_limited_rgb[3][4] = {
75 - { 0x1b80, 0x0000, 0x0000, 0x0400 },
76 - { 0x0000, 0x1b80, 0x0000, 0x0400 },
77 - { 0x0000, 0x0000, 0x1b80, 0x0400 },
78 +static const u16 vc5_hdmi_csc_full_rgb_to_rgb[2][3][4] = {
79 + {
80 + /* Full range - unity */
81 + { 0x2000, 0x0000, 0x0000, 0x0000 },
82 + { 0x0000, 0x2000, 0x0000, 0x0000 },
83 + { 0x0000, 0x0000, 0x2000, 0x0000 },
84 + }, {
85 + /* Limited range */
86 + { 0x1b80, 0x0000, 0x0000, 0x0400 },
87 + { 0x0000, 0x1b80, 0x0000, 0x0400 },
88 + { 0x0000, 0x0000, 0x1b80, 0x0400 },
89 + }
90 +};
91 +
92 +/*
93 + * Conversion between Full Range RGB and YUV using the BT.601 Colorspace
94 + *
95 + * Full range
96 + * [ 0.299000 0.587000 0.114000 0.000000 ]
97 + * [ -0.168736 -0.331264 0.500000 128.000000 ]
98 + * [ 0.500000 -0.418688 -0.081312 128.000000 ]
99 + *
100 + * Limited range
101 + * [ 0.255785 0.502160 0.097523 16.000000 ]
102 + * [ -0.147644 -0.289856 0.437500 128.000000 ]
103 + * [ 0.437500 -0.366352 -0.071148 128.000000 ]
104 + *
105 + * Matrix is signed 2p13 fixed point, with signed 9p6 offsets
106 + */
107 +static const u16 vc5_hdmi_csc_full_rgb_to_yuv_bt601[2][3][4] = {
108 + {
109 + /* Full range */
110 + { 0x0991, 0x12c9, 0x03a6, 0x0000 },
111 + { 0xfa9b, 0xf567, 0x1000, 0x2000 },
112 + { 0x1000, 0xf29b, 0xfd67, 0x2000 },
113 + }, {
114 + /* Limited range */
115 + { 0x082f, 0x1012, 0x031f, 0x0400 },
116 + { 0xfb48, 0xf6ba, 0x0e00, 0x2000 },
117 + { 0x0e00, 0xf448, 0xfdba, 0x2000 },
118 + }
119 };
120
121 /*
122 - * Conversion between Full Range RGB and Full Range YUV422 using the
123 - * BT.709 Colorspace
124 + * Conversion between Full Range RGB and YUV using the BT.709 Colorspace
125 *
126 + * Full range
127 + * [ 0.212600 0.715200 0.072200 0.000000 ]
128 + * [ -0.114572 -0.385428 0.500000 128.000000 ]
129 + * [ 0.500000 -0.454153 -0.045847 128.000000 ]
130 *
131 - * [ 0.181906 0.611804 0.061758 16 ]
132 - * [ -0.100268 -0.337232 0.437500 128 ]
133 - * [ 0.437500 -0.397386 -0.040114 128 ]
134 + * Limited range
135 + * [ 0.181873 0.611831 0.061765 16.000000 ]
136 + * [ -0.100251 -0.337249 0.437500 128.000000 ]
137 + * [ 0.437500 -0.397384 -0.040116 128.000000 ]
138 *
139 * Matrix is signed 2p13 fixed point, with signed 9p6 offsets
140 */
141 -static const u16 vc5_hdmi_csc_full_rgb_to_limited_yuv422_bt709[3][4] = {
142 - { 0x05d2, 0x1394, 0x01fa, 0x0400 },
143 - { 0xfccc, 0xf536, 0x0e00, 0x2000 },
144 - { 0x0e00, 0xf34a, 0xfeb8, 0x2000 },
145 +static const u16 vc5_hdmi_csc_full_rgb_to_yuv_bt709[2][3][4] = {
146 + {
147 + /* Full range */
148 + { 0x06ce, 0x16e3, 0x024f, 0x0000 },
149 + { 0xfc56, 0xf3ac, 0x1000, 0x2000 },
150 + { 0x1000, 0xf179, 0xfe89, 0x2000 },
151 + }, {
152 + /* Limited range */
153 + { 0x05d2, 0x1394, 0x01fa, 0x0400 },
154 + { 0xfccc, 0xf536, 0x0e00, 0x2000 },
155 + { 0x0e00, 0xf34a, 0xfeb8, 0x2000 },
156 + }
157 };
158
159 /*
160 - * Conversion between Full Range RGB and Full Range YUV444 using the
161 - * BT.709 Colorspace
162 + * Conversion between Full Range RGB and YUV using the BT.2020 Colorspace
163 *
164 - * [ -0.100268 -0.337232 0.437500 128 ]
165 - * [ 0.437500 -0.397386 -0.040114 128 ]
166 - * [ 0.181906 0.611804 0.061758 16 ]
167 + * Full range
168 + * [ 0.262700 0.678000 0.059300 0.000000 ]
169 + * [ -0.139630 -0.360370 0.500000 128.000000 ]
170 + * [ 0.500000 -0.459786 -0.040214 128.000000 ]
171 + *
172 + * Limited range
173 + * [ 0.224732 0.580008 0.050729 16.000000 ]
174 + * [ -0.122176 -0.315324 0.437500 128.000000 ]
175 + * [ 0.437500 -0.402312 -0.035188 128.000000 ]
176 *
177 * Matrix is signed 2p13 fixed point, with signed 9p6 offsets
178 */
179 -static const u16 vc5_hdmi_csc_full_rgb_to_limited_yuv444_bt709[3][4] = {
180 - { 0xfccc, 0xf536, 0x0e00, 0x2000 },
181 - { 0x0e00, 0xf34a, 0xfeb8, 0x2000 },
182 - { 0x05d2, 0x1394, 0x01fa, 0x0400 },
183 +static const u16 vc5_hdmi_csc_full_rgb_to_yuv_bt2020[2][3][4] = {
184 + {
185 + /* Full range */
186 + { 0x0868, 0x15b2, 0x01e6, 0x0000 },
187 + { 0xfb89, 0xf479, 0x1000, 0x2000 },
188 + { 0x1000, 0xf14a, 0xfeb8, 0x2000 },
189 + }, {
190 + /* Limited range */
191 + { 0x0731, 0x128f, 0x01a0, 0x0400 },
192 + { 0xfc18, 0xf5ea, 0x0e00, 0x2000 },
193 + { 0x0e00, 0xf321, 0xfee1, 0x2000 },
194 + }
195 };
196
197 static void vc5_hdmi_set_csc_coeffs(struct vc4_hdmi *vc4_hdmi,
198 @@ -1264,6 +1317,20 @@ static void vc5_hdmi_set_csc_coeffs(stru
199 HDMI_WRITE(HDMI_CSC_34_33, (coeffs[2][3] << 16) | coeffs[2][2]);
200 }
201
202 +static void vc5_hdmi_set_csc_coeffs_swap(struct vc4_hdmi *vc4_hdmi,
203 + const u16 coeffs[3][4])
204 +{
205 + lockdep_assert_held(&vc4_hdmi->hw_lock);
206 +
207 + /* YUV444 needs the CSC matrices using the channels in a different order */
208 + HDMI_WRITE(HDMI_CSC_12_11, (coeffs[2][1] << 16) | coeffs[2][0]);
209 + HDMI_WRITE(HDMI_CSC_14_13, (coeffs[2][3] << 16) | coeffs[2][2]);
210 + HDMI_WRITE(HDMI_CSC_22_21, (coeffs[0][1] << 16) | coeffs[0][0]);
211 + HDMI_WRITE(HDMI_CSC_24_23, (coeffs[0][3] << 16) | coeffs[0][2]);
212 + HDMI_WRITE(HDMI_CSC_32_31, (coeffs[1][1] << 16) | coeffs[1][0]);
213 + HDMI_WRITE(HDMI_CSC_34_33, (coeffs[1][3] << 16) | coeffs[1][2]);
214 +}
215 +
216 static void vc5_hdmi_csc_setup(struct vc4_hdmi *vc4_hdmi,
217 struct drm_connector_state *state,
218 const struct drm_display_mode *mode)
219 @@ -1271,6 +1338,8 @@ static void vc5_hdmi_csc_setup(struct vc
220 struct drm_device *drm = vc4_hdmi->connector.dev;
221 struct vc4_hdmi_connector_state *vc4_state =
222 conn_state_to_vc4_hdmi_conn_state(state);
223 + unsigned int lim_range = vc4_hdmi_is_full_range(vc4_hdmi, mode) ? 0 : 1;
224 + const u16 (*csc)[4];
225 unsigned long flags;
226 u32 if_cfg = 0;
227 u32 if_xbar = 0x543210;
228 @@ -1286,31 +1355,56 @@ static void vc5_hdmi_csc_setup(struct vc
229
230 switch (vc4_state->output_format) {
231 case VC4_HDMI_OUTPUT_YUV444:
232 - vc5_hdmi_set_csc_coeffs(vc4_hdmi, vc5_hdmi_csc_full_rgb_to_limited_yuv444_bt709);
233 - break;
234 -
235 case VC4_HDMI_OUTPUT_YUV422:
236 - csc_ctl |= VC4_SET_FIELD(VC5_MT_CP_CSC_CTL_FILTER_MODE_444_TO_422_STANDARD,
237 - VC5_MT_CP_CSC_CTL_FILTER_MODE_444_TO_422) |
238 - VC5_MT_CP_CSC_CTL_USE_444_TO_422 |
239 - VC5_MT_CP_CSC_CTL_USE_RNG_SUPPRESSION;
240 -
241 - csc_chan_ctl |= VC4_SET_FIELD(VC5_MT_CP_CHANNEL_CTL_OUTPUT_REMAP_LEGACY_STYLE,
242 - VC5_MT_CP_CHANNEL_CTL_OUTPUT_REMAP);
243 + switch (state->colorspace) {
244 + default:
245 + case DRM_MODE_COLORIMETRY_NO_DATA:
246 + case DRM_MODE_COLORIMETRY_BT709_YCC:
247 + case DRM_MODE_COLORIMETRY_XVYCC_709:
248 + case DRM_MODE_COLORIMETRY_RGB_WIDE_FIXED:
249 + case DRM_MODE_COLORIMETRY_RGB_WIDE_FLOAT:
250 + csc = vc5_hdmi_csc_full_rgb_to_yuv_bt709[lim_range];
251 + break;
252 + case DRM_MODE_COLORIMETRY_SMPTE_170M_YCC:
253 + case DRM_MODE_COLORIMETRY_XVYCC_601:
254 + case DRM_MODE_COLORIMETRY_SYCC_601:
255 + case DRM_MODE_COLORIMETRY_OPYCC_601:
256 + case DRM_MODE_COLORIMETRY_BT601_YCC:
257 + csc = vc5_hdmi_csc_full_rgb_to_yuv_bt601[lim_range];
258 + break;
259 + case DRM_MODE_COLORIMETRY_BT2020_CYCC:
260 + case DRM_MODE_COLORIMETRY_BT2020_YCC:
261 + case DRM_MODE_COLORIMETRY_BT2020_RGB:
262 + case DRM_MODE_COLORIMETRY_DCI_P3_RGB_D65:
263 + case DRM_MODE_COLORIMETRY_DCI_P3_RGB_THEATER:
264 + csc = vc5_hdmi_csc_full_rgb_to_yuv_bt2020[lim_range];
265 + break;
266 + }
267
268 - if_cfg |= VC4_SET_FIELD(VC5_DVP_HT_VEC_INTERFACE_CFG_SEL_422_FORMAT_422_LEGACY,
269 - VC5_DVP_HT_VEC_INTERFACE_CFG_SEL_422);
270 + if (vc4_state->output_format == VC4_HDMI_OUTPUT_YUV422) {
271 + csc_ctl |= VC4_SET_FIELD(VC5_MT_CP_CSC_CTL_FILTER_MODE_444_TO_422_STANDARD,
272 + VC5_MT_CP_CSC_CTL_FILTER_MODE_444_TO_422) |
273 + VC5_MT_CP_CSC_CTL_USE_444_TO_422 |
274 + VC5_MT_CP_CSC_CTL_USE_RNG_SUPPRESSION;
275 +
276 + csc_chan_ctl |= VC4_SET_FIELD(VC5_MT_CP_CHANNEL_CTL_OUTPUT_REMAP_LEGACY_STYLE,
277 + VC5_MT_CP_CHANNEL_CTL_OUTPUT_REMAP);
278 +
279 + if_cfg |= VC4_SET_FIELD(VC5_DVP_HT_VEC_INTERFACE_CFG_SEL_422_FORMAT_422_LEGACY,
280 + VC5_DVP_HT_VEC_INTERFACE_CFG_SEL_422);
281 +
282 + vc5_hdmi_set_csc_coeffs(vc4_hdmi, csc);
283 + } else {
284 + vc5_hdmi_set_csc_coeffs_swap(vc4_hdmi, csc);
285 + }
286
287 - vc5_hdmi_set_csc_coeffs(vc4_hdmi, vc5_hdmi_csc_full_rgb_to_limited_yuv422_bt709);
288 break;
289
290 case VC4_HDMI_OUTPUT_RGB:
291 if_xbar = 0x354021;
292
293 - if (!vc4_hdmi_is_full_range_rgb(vc4_hdmi, mode))
294 - vc5_hdmi_set_csc_coeffs(vc4_hdmi, vc5_hdmi_csc_full_rgb_to_limited_rgb);
295 - else
296 - vc5_hdmi_set_csc_coeffs(vc4_hdmi, vc5_hdmi_csc_full_rgb_unity);
297 + vc5_hdmi_set_csc_coeffs(vc4_hdmi,
298 + vc5_hdmi_csc_full_rgb_to_rgb[lim_range]);
299 break;
300
301 default: