1 From 21089867278deb2a110b685e3cd33f64f9ce41e2 Mon Sep 17 00:00:00 2001
2 From: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
3 Date: Wed, 18 May 2022 15:55:17 +0100
4 Subject: [PATCH 10/12] net: mtk_eth_soc: move restoration of SYSCFG0 to
7 The SGMIISYS configuration is performed while ETHSYS_SYSCFG0 is in a
8 disabled state. In order to preserve this when we switch to phylink_pcs
9 we need to move the restoration of this register to the mac_finish()
12 Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
13 Signed-off-by: Jakub Kicinski <kuba@kernel.org>
15 drivers/net/ethernet/mediatek/mtk_eth_soc.c | 11 +++++++++--
16 drivers/net/ethernet/mediatek/mtk_eth_soc.h | 1 +
17 2 files changed, 10 insertions(+), 2 deletions(-)
19 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
20 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
21 @@ -447,8 +447,8 @@ static void mtk_mac_config(struct phylin
25 - regmap_update_bits(eth->ethsys, ETHSYS_SYSCFG0,
26 - SYSCFG0_SGMII_MASK, val);
27 + /* Save the syscfg0 value for mac_finish */
29 } else if (phylink_autoneg_inband(mode)) {
31 "In-band mode not supported in non SGMII mode!\n");
32 @@ -472,8 +472,15 @@ static int mtk_mac_finish(struct phylink
34 struct mtk_mac *mac = container_of(config, struct mtk_mac,
36 + struct mtk_eth *eth = mac->hw;
40 + if (interface == PHY_INTERFACE_MODE_SGMII ||
41 + phy_interface_mode_is_8023z(interface))
42 + regmap_update_bits(eth->ethsys, ETHSYS_SYSCFG0,
43 + SYSCFG0_SGMII_MASK, mac->syscfg0);
46 mcr_cur = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id));
48 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
49 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
50 @@ -1087,6 +1087,7 @@ struct mtk_mac {
51 struct mtk_hw_stats *hw_stats;
52 __be32 hwlro_ip[MTK_MAX_LRO_IP_CNT];
54 + unsigned int syscfg0;
57 /* the struct describing the SoC. these are declared in the soc_xyz.c files */