ac322e19390afb6713b780c6bb2391a562c72505
[openwrt/staging/ldir.git] /
1 From 2555f35a4f428a9bfdf09aa0459dbfdf59a24a9a Mon Sep 17 00:00:00 2001
2 From: Christian Marangi <ansuelsmth@gmail.com>
3 Date: Wed, 21 Jun 2023 11:54:09 +0200
4 Subject: [PATCH] net: dsa: qca8k: add support for additional modes for netdev
5 trigger
6
7 The QCA8K switch supports additional modes that can be handled in
8 hardware for the LED netdev trigger.
9
10 Add these additional modes to further support the Switch LEDs and
11 offload more blink modes.
12
13 Add additional modes:
14 - link_10
15 - link_100
16 - link_1000
17 - half_duplex
18 - full_duplex
19
20 Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
21 Reviewed-by: Andrew Lunn <andrew@lunn.ch>
22 Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
23 Link: https://lore.kernel.org/r/20230621095409.25859-1-ansuelsmth@gmail.com
24 Signed-off-by: Jakub Kicinski <kuba@kernel.org>
25 ---
26 drivers/net/dsa/qca/qca8k-leds.c | 20 ++++++++++++++++++++
27 1 file changed, 20 insertions(+)
28
29 --- a/drivers/net/dsa/qca/qca8k-leds.c
30 +++ b/drivers/net/dsa/qca/qca8k-leds.c
31 @@ -68,6 +68,16 @@ qca8k_parse_netdev(unsigned long rules,
32 *offload_trigger |= QCA8K_LED_TX_BLINK_MASK;
33 if (test_bit(TRIGGER_NETDEV_RX, &rules))
34 *offload_trigger |= QCA8K_LED_RX_BLINK_MASK;
35 + if (test_bit(TRIGGER_NETDEV_LINK_10, &rules))
36 + *offload_trigger |= QCA8K_LED_LINK_10M_EN_MASK;
37 + if (test_bit(TRIGGER_NETDEV_LINK_100, &rules))
38 + *offload_trigger |= QCA8K_LED_LINK_100M_EN_MASK;
39 + if (test_bit(TRIGGER_NETDEV_LINK_1000, &rules))
40 + *offload_trigger |= QCA8K_LED_LINK_1000M_EN_MASK;
41 + if (test_bit(TRIGGER_NETDEV_HALF_DUPLEX, &rules))
42 + *offload_trigger |= QCA8K_LED_HALF_DUPLEX_MASK;
43 + if (test_bit(TRIGGER_NETDEV_FULL_DUPLEX, &rules))
44 + *offload_trigger |= QCA8K_LED_FULL_DUPLEX_MASK;
45
46 if (rules && !*offload_trigger)
47 return -EOPNOTSUPP;
48 @@ -322,6 +332,16 @@ qca8k_cled_hw_control_get(struct led_cla
49 set_bit(TRIGGER_NETDEV_TX, rules);
50 if (val & QCA8K_LED_RX_BLINK_MASK)
51 set_bit(TRIGGER_NETDEV_RX, rules);
52 + if (val & QCA8K_LED_LINK_10M_EN_MASK)
53 + set_bit(TRIGGER_NETDEV_LINK_10, rules);
54 + if (val & QCA8K_LED_LINK_100M_EN_MASK)
55 + set_bit(TRIGGER_NETDEV_LINK_100, rules);
56 + if (val & QCA8K_LED_LINK_1000M_EN_MASK)
57 + set_bit(TRIGGER_NETDEV_LINK_1000, rules);
58 + if (val & QCA8K_LED_HALF_DUPLEX_MASK)
59 + set_bit(TRIGGER_NETDEV_HALF_DUPLEX, rules);
60 + if (val & QCA8K_LED_FULL_DUPLEX_MASK)
61 + set_bit(TRIGGER_NETDEV_FULL_DUPLEX, rules);
62
63 return 0;
64 }