a6ff55b3fbfe0cba7d1d6f3098ecb1ba43c8d94a
[openwrt/openwrt.git] /
1 From 8eb2c08d504ac0697285b08084487fd3869ea7b6 Mon Sep 17 00:00:00 2001
2 From: Viorel Suman <viorel.suman@nxp.com>
3 Date: Thu, 8 Feb 2018 12:47:24 +0200
4 Subject: [PATCH] MLK-17528-1: ASoC: fsl_sai: Introduce FSL_SAI_CLK_BIT clock
5 id
6
7 Introduce FSL_SAI_CLK_BIT clock id in order to distinguish
8 the bit clock and master clocks in "set_sysclk" API.
9
10 Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
11 Suggested-by: Shengjiu Wang <shengjiu.wang@nxp.com>
12 Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
13 Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
14 ---
15 sound/soc/fsl/fsl_sai.c | 5 ++++-
16 sound/soc/fsl/fsl_sai.h | 1 +
17 2 files changed, 5 insertions(+), 1 deletion(-)
18
19 --- a/sound/soc/fsl/fsl_sai.c
20 +++ b/sound/soc/fsl/fsl_sai.c
21 @@ -240,7 +240,10 @@ static int fsl_sai_set_dai_sysclk(struct
22 if (dir == SND_SOC_CLOCK_IN)
23 return 0;
24
25 - sai->bitclk_freq = freq;
26 + if (clk_id == FSL_SAI_CLK_BIT) {
27 + sai->bitclk_freq = freq;
28 + return 0;
29 + }
30
31 ret = fsl_sai_set_dai_sysclk_tr(cpu_dai, clk_id, freq,
32 FSL_FMT_TRANSMITTER);
33 --- a/sound/soc/fsl/fsl_sai.h
34 +++ b/sound/soc/fsl/fsl_sai.h
35 @@ -160,6 +160,7 @@
36 #define FSL_SAI_CLK_MAST3 3
37
38 #define FSL_SAI_MCLK_MAX 4
39 +#define FSL_SAI_CLK_BIT 5
40
41 /* SAI data transfer numbers per DMA request */
42 #define FSL_SAI_MAXBURST_TX 6