git.openwrt.org Git - openwrt/staging/neocturne.git/blob

   1 From db5f028309ede13767e2ba356c1975ac37a4fd6c Mon Sep 17 00:00:00 2001
   2 From: Andre Przywara <andre.przywara@arm.com>
   3 Date: Mon, 31 Oct 2022 11:13:57 +0000
   4 Subject: [PATCH] arm64: dts: allwinner: h616: OrangePi Zero 2: Add USB nodes
   5
   6 The OrangePi Zero 2 has one USB-A host port, VBUS is provided by
   7 a GPIO controlled regulator.
   8 The USB-C port is meant to power the board, but is also connected to
   9 the USB 0 port, which we configure as an MUSB peripheral.
  10
  11 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
  12 Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
  13 Link: https://lore.kernel.org/r/20221031111358.3387297-7-andre.przywara@arm.com
  14 Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
  15 ---
  16  .../allwinner/sun50i-h616-orangepi-zero2.dts  | 41 +++++++++++++++++++
  17  1 file changed, 41 insertions(+)
  18
  19 --- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
  20 +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
  21 @@ -49,8 +49,24 @@
  22                 regulator-max-microvolt = <5000000>;
  23                 regulator-always-on;
  24         };
  25 +
  26 +       reg_usb1_vbus: regulator-usb1-vbus {
  27 +               compatible = "regulator-fixed";
  28 +               regulator-name = "usb1-vbus";
  29 +               regulator-min-microvolt = <5000000>;
  30 +               regulator-max-microvolt = <5000000>;
  31 +               vin-supply = <&reg_vcc5v>;
  32 +               enable-active-high;
  33 +               gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */
  34 +       };
  35 +};
  36 +
  37 +&ehci1 {
  38 +       status = "okay";
  39  };
  40
  41 +/* USB 2 & 3 are on headers only. */
  42 +
  43  &emac0 {
  44         pinctrl-names = "default";
  45         pinctrl-0 = <&ext_rgmii_pins>;
  46 @@ -76,6 +92,10 @@
  47         status = "okay";
  48  };
  49
  50 +&ohci1 {
  51 +       status = "okay";
  52 +};
  53 +
  54  &r_rsb {
  55         status = "okay";
  56
  57 @@ -211,3 +231,24 @@
  58         pinctrl-0 = <&uart0_ph_pins>;
  59         status = "okay";
  60  };
  61 +
  62 +&usbotg {
  63 +       /*
  64 +        * PHY0 pins are connected to a USB-C socket, but a role switch
  65 +        * is not implemented: both CC pins are pulled to GND.
  66 +        * The VBUS pins power the device, so a fixed peripheral mode
  67 +        * is the best choice.
  68 +        * The board can be powered via GPIOs, in this case port0 *can*
  69 +        * act as a host (with a cable/adapter ignoring CC), as VBUS is
  70 +        * then provided by the GPIOs. Any user of this setup would
  71 +        * need to adjust the DT accordingly: dr_mode set to "host",
  72 +        * enabling OHCI0 and EHCI0.
  73 +        */
  74 +       dr_mode = "peripheral";
  75 +       status = "okay";
  76 +};
  77 +
  78 +&usbphy {
  79 +       usb1_vbus-supply = <&reg_usb1_vbus>;
  80 +       status = "okay";
  81 +};