a37cf66def239410fbf6ce4a701dcf102a2b217f
[openwrt/openwrt.git] /
1 From 714e8c634821b340c191a157e8c4e0b1afd53dfc Mon Sep 17 00:00:00 2001
2 From: Alex Marginean <alexandru.marginean@nxp.com>
3 Date: Wed, 8 Jan 2020 15:21:53 +0200
4 Subject: [PATCH] drivers: net: mscc_ocelot: don't flood unicast traffic to cpu
5
6 Switch cpu port doesn't learn MAC addresses and the local bridge dev_addr
7 must be explicitly added to the bridge.
8 This is done whenever a port is added to a bridge, ports following the
9 1st one will just overwrite the same entry.
10
11 Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
12 ---
13 drivers/net/ethernet/mscc/ocelot.c | 8 ++++++++
14 1 file changed, 8 insertions(+)
15
16 --- a/drivers/net/ethernet/mscc/ocelot.c
17 +++ b/drivers/net/ethernet/mscc/ocelot.c
18 @@ -1677,6 +1677,8 @@ static int ocelot_port_obj_del(struct ne
19 int ocelot_port_bridge_join(struct ocelot *ocelot, int port,
20 struct net_device *bridge)
21 {
22 + struct ocelot_port *ocelot_port = ocelot->ports[port];
23 +
24 if (!ocelot->bridge_mask) {
25 ocelot->hw_bridge_dev = bridge;
26 } else {
27 @@ -1688,6 +1690,12 @@ int ocelot_port_bridge_join(struct ocelo
28
29 ocelot->bridge_mask |= BIT(port);
30
31 + /* Direct CPU traffic to PCU port, this should override any existing
32 + * entries
33 + */
34 + ocelot_mact_learn(ocelot, PGID_CPU, bridge->dev_addr, ocelot_port->pvid,
35 + ENTRYTYPE_LOCKED);
36 +
37 return 0;
38 }
39 EXPORT_SYMBOL(ocelot_port_bridge_join);