a288938b2a911825674acde2441d6775df0642e6
[openwrt/staging/dedeckeh.git] /
1 From 9507f517ac4080627515c31c937f45a4a58ccbe4 Mon Sep 17 00:00:00 2001
2 From: Alex Marginean <alexandru.marginean@nxp.com>
3 Date: Fri, 14 Feb 2020 17:28:26 +0000
4 Subject: [PATCH] LF-924: net/enetc: Set MAC Rx FIFO to recommended value
5
6 On LS1028A the MAC Rx FIFO defaults to value 2, which is too high and may
7 lead to Rx lock-up under traffic. Set it to 1 instead, as recommended by
8 the hardware team.
9
10 Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
11 Reviewed-by: Claudiu Manoil <claudiu.manoil@nxp.com>
12 Acked-by: Jason Liu <jason.hui.liu@nxp.com>
13 ---
14 drivers/net/ethernet/freescale/enetc/enetc_hw.h | 2 ++
15 drivers/net/ethernet/freescale/enetc/enetc_pf.c | 6 ++++++
16 2 files changed, 8 insertions(+)
17
18 --- a/drivers/net/ethernet/freescale/enetc/enetc_hw.h
19 +++ b/drivers/net/ethernet/freescale/enetc/enetc_hw.h
20 @@ -224,6 +224,8 @@ enum enetc_bdr_type {TX, RX};
21 #define ENETC_PM0_MAXFRM 0x8014
22 #define ENETC_SET_TX_MTU(val) ((val) << 16)
23 #define ENETC_SET_MAXFRM(val) ((val) & 0xffff)
24 +#define ENETC_PM0_RX_FIFO 0x801c
25 +#define ENETC_PM0_RX_FIFO_VAL 1
26
27 #define ENETC_PM_IMDIO_BASE 0x8030
28 /* PCS registers */
29 --- a/drivers/net/ethernet/freescale/enetc/enetc_pf.c
30 +++ b/drivers/net/ethernet/freescale/enetc/enetc_pf.c
31 @@ -536,6 +536,12 @@ static void enetc_configure_port_mac(str
32 enetc_port_wr(hw, ENETC_PM0_IF_MODE, ENETC_PM0_IFM_XGMII);
33 enetc_port_wr(hw, ENETC_PM1_IF_MODE, ENETC_PM0_IFM_XGMII);
34 }
35 +
36 + /* on LS1028A the MAC Rx FIFO defaults to value 2, which is too high and
37 + * may lead to Rx lock-up under traffic. Set it to 1 instead, as
38 + * recommended by the hardware team.
39 + */
40 + enetc_port_wr(hw, ENETC_PM0_RX_FIFO, ENETC_PM0_RX_FIFO_VAL);
41 }
42
43 static void enetc_configure_port_pmac(struct enetc_hw *hw)