1 From db656eb11aebb0d7e4b833f9b452503ddb1351f1 Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
3 Date: Fri, 23 Sep 2016 04:54:27 +0200
4 Subject: [PATCH] i2c: bcm2835: Add support for Repeated Start Condition
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
9 Documentation/i2c/i2c-protocol states that Combined transactions should
10 separate messages with a Start bit and end the whole transaction with a
11 Stop bit. This patch adds support for issuing only a Start between
12 messages instead of a Stop followed by a Start.
14 This implementation differs from downstream i2c-bcm2708 in 2 respects:
15 - it uses an interrupt to detect that the transfer is active instead
16 of using polling. There is no interrupt for Transfer Active, but by
17 not prefilling the FIFO it's possible to use the TXW interrupt.
18 - when resetting/disabling the controller between transfers it writes
19 CLEAR to the control register instead of just zero.
20 Using just zero gave many errors. This might be the reason why
21 downstream had to disable this feature and make it available with a
24 I have run thousands of transfers to a DS1307 (rtc), MMA8451 (accel)
25 and AT24C32 (eeprom) in parallel without problems.
27 Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
28 Acked-by: Eric Anholt <eric@anholt.net>
30 drivers/i2c/busses/i2c-bcm2835.c | 101 ++++++++++++++++++++++++---------------
31 1 file changed, 63 insertions(+), 38 deletions(-)
33 --- a/drivers/i2c/busses/i2c-bcm2835.c
34 +++ b/drivers/i2c/busses/i2c-bcm2835.c
35 @@ -63,6 +63,7 @@ struct bcm2835_i2c_dev {
36 struct i2c_adapter adapter;
37 struct completion completion;
38 struct i2c_msg *curr_msg;
42 size_t msg_buf_remaining;
43 @@ -110,6 +111,45 @@ static void bcm2835_drain_rxfifo(struct
47 + * Repeated Start Condition (Sr)
48 + * The BCM2835 ARM Peripherals datasheet mentions a way to trigger a Sr when it
49 + * talks about reading from a slave with 10 bit address. This is achieved by
50 + * issuing a write, poll the I2CS.TA flag and wait for it to be set, and then
52 + * A comment in https://github.com/raspberrypi/linux/issues/254 shows how the
53 + * firmware actually does it using polling and says that it's a workaround for
54 + * a problem in the state machine.
55 + * It turns out that it is possible to use the TXW interrupt to know when the
56 + * transfer is active, provided the FIFO has not been prefilled.
59 +static void bcm2835_i2c_start_transfer(struct bcm2835_i2c_dev *i2c_dev)
61 + u32 c = BCM2835_I2C_C_ST | BCM2835_I2C_C_I2CEN;
62 + struct i2c_msg *msg = i2c_dev->curr_msg;
63 + bool last_msg = (i2c_dev->num_msgs == 1);
65 + if (!i2c_dev->num_msgs)
68 + i2c_dev->num_msgs--;
69 + i2c_dev->msg_buf = msg->buf;
70 + i2c_dev->msg_buf_remaining = msg->len;
72 + if (msg->flags & I2C_M_RD)
73 + c |= BCM2835_I2C_C_READ | BCM2835_I2C_C_INTR;
75 + c |= BCM2835_I2C_C_INTT;
78 + c |= BCM2835_I2C_C_INTD;
80 + bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_A, msg->addr);
81 + bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DLEN, msg->len);
82 + bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, c);
86 * Note about I2C_C_CLEAR on error:
87 * The I2C_C_CLEAR on errors will take some time to resolve -- if you were in
88 * non-idle state and I2C_C_READ, it sets an abort_rx flag and runs through
89 @@ -153,6 +193,12 @@ static irqreturn_t bcm2835_i2c_isr(int t
92 bcm2835_fill_txfifo(i2c_dev);
94 + if (i2c_dev->num_msgs && !i2c_dev->msg_buf_remaining) {
95 + i2c_dev->curr_msg++;
96 + bcm2835_i2c_start_transfer(i2c_dev);
102 @@ -177,30 +223,25 @@ complete:
106 -static int bcm2835_i2c_xfer_msg(struct bcm2835_i2c_dev *i2c_dev,
107 - struct i2c_msg *msg)
108 +static int bcm2835_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[],
112 + struct bcm2835_i2c_dev *i2c_dev = i2c_get_adapdata(adap);
113 unsigned long time_left;
116 - i2c_dev->curr_msg = msg;
117 - i2c_dev->msg_buf = msg->buf;
118 - i2c_dev->msg_buf_remaining = msg->len;
119 - reinit_completion(&i2c_dev->completion);
121 - bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, BCM2835_I2C_C_CLEAR);
122 + for (i = 0; i < (num - 1); i++)
123 + if (msgs[i].flags & I2C_M_RD) {
124 + dev_warn_once(i2c_dev->dev,
125 + "only one read message supported, has to be last\n");
126 + return -EOPNOTSUPP;
129 - if (msg->flags & I2C_M_RD) {
130 - c = BCM2835_I2C_C_READ | BCM2835_I2C_C_INTR;
132 - c = BCM2835_I2C_C_INTT;
133 - bcm2835_fill_txfifo(i2c_dev);
135 - c |= BCM2835_I2C_C_ST | BCM2835_I2C_C_INTD | BCM2835_I2C_C_I2CEN;
136 + i2c_dev->curr_msg = msgs;
137 + i2c_dev->num_msgs = num;
138 + reinit_completion(&i2c_dev->completion);
140 - bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_A, msg->addr);
141 - bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DLEN, msg->len);
142 - bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, c);
143 + bcm2835_i2c_start_transfer(i2c_dev);
145 time_left = wait_for_completion_timeout(&i2c_dev->completion,
146 BCM2835_I2C_TIMEOUT);
147 @@ -211,31 +252,15 @@ static int bcm2835_i2c_xfer_msg(struct b
151 - if (likely(!i2c_dev->msg_err))
153 + if (!i2c_dev->msg_err)
156 dev_dbg(i2c_dev->dev, "i2c transfer failed: %x\n", i2c_dev->msg_err);
158 if (i2c_dev->msg_err & BCM2835_I2C_S_ERR)
164 -static int bcm2835_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[],
167 - struct bcm2835_i2c_dev *i2c_dev = i2c_get_adapdata(adap);
171 - for (i = 0; i < num; i++) {
172 - ret = bcm2835_i2c_xfer_msg(i2c_dev, &msgs[i]);
181 static u32 bcm2835_i2c_func(struct i2c_adapter *adap)