9963062195e90d13ac2cdc30942ba378e9a33cb8
[openwrt/staging/pepe2k.git] /
1 From 55e00e402d6143aeb153761f8144d9fee5f1f009 Mon Sep 17 00:00:00 2001
2 From: Biwen Li <biwen.li@nxp.com>
3 Date: Fri, 26 Oct 2018 16:00:37 +0800
4 Subject: [PATCH] arm: dts: ls1021a: Add LS1021A-IOT board support
5
6 Signed-off-by: Biwen Li <biwen.li@nxp.com>
7 [rebase]
8 Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
9 ---
10 arch/arm/boot/dts/Makefile | 3 +-
11 arch/arm/boot/dts/ls1021a-iot.dts | 262 ++++++++++++++++++++++++++++++++++++++
12 2 files changed, 264 insertions(+), 1 deletion(-)
13 create mode 100644 arch/arm/boot/dts/ls1021a-iot.dts
14
15 --- a/arch/arm/boot/dts/Makefile
16 +++ b/arch/arm/boot/dts/Makefile
17 @@ -611,7 +611,8 @@ dtb-$(CONFIG_SOC_LS1021A) += \
18 ls1021a-moxa-uc-8410a.dtb \
19 ls1021a-qds.dtb \
20 ls1021a-tsn.dtb \
21 - ls1021a-twr.dtb
22 + ls1021a-twr.dtb \
23 + ls1021a-iot.dtb
24 dtb-$(CONFIG_SOC_VF610) += \
25 vf500-colibri-eval-v3.dtb \
26 vf610-bk4.dtb \
27 --- /dev/null
28 +++ b/arch/arm/boot/dts/ls1021a-iot.dts
29 @@ -0,0 +1,262 @@
30 +/*
31 + * Copyright 2013-2016 Freescale Semiconductor, Inc.
32 + *
33 + * This program is free software; you can redistribute it and/or modify
34 + * it under the terms of the GNU General Public License as published by
35 + * the Free Software Foundation; either version 2 of the License, or
36 + * (at your option) any later version.
37 + */
38 +
39 +/dts-v1/;
40 +#include "ls1021a.dtsi"
41 +
42 +/ {
43 + model = "LS1021A IOT Board";
44 +
45 + sys_mclk: clock-mclk {
46 + compatible = "fixed-clock";
47 + #clock-cells = <0>;
48 + clock-frequency = <24576000>;
49 + };
50 +
51 + regulators {
52 + compatible = "simple-bus";
53 + #address-cells = <1>;
54 + #size-cells = <0>;
55 +
56 + reg_3p3v: regulator@0 {
57 + compatible = "regulator-fixed";
58 + reg = <0>;
59 + regulator-name = "3P3V";
60 + regulator-min-microvolt = <3300000>;
61 + regulator-max-microvolt = <3300000>;
62 + regulator-always-on;
63 + };
64 +
65 + reg_2p5v: regulator@1 {
66 + compatible = "regulator-fixed";
67 + reg = <1>;
68 + regulator-name = "2P5V";
69 + regulator-min-microvolt = <2500000>;
70 + regulator-max-microvolt = <2500000>;
71 + regulator-always-on;
72 + };
73 + };
74 +
75 + sound {
76 + compatible = "simple-audio-card";
77 + simple-audio-card,format = "i2s";
78 + simple-audio-card,widgets =
79 + "Microphone", "Microphone Jack",
80 + "Headphone", "Headphone Jack",
81 + "Speaker", "Speaker Ext",
82 + "Line", "Line In Jack";
83 + simple-audio-card,routing =
84 + "MIC_IN", "Microphone Jack",
85 + "Microphone Jack", "Mic Bias",
86 + "LINE_IN", "Line In Jack",
87 + "Headphone Jack", "HP_OUT",
88 + "Speaker Ext", "LINE_OUT";
89 +
90 + simple-audio-card,cpu {
91 + sound-dai = <&sai2>;
92 + frame-master;
93 + bitclock-master;
94 + };
95 +
96 + simple-audio-card,codec {
97 + sound-dai = <&codec>;
98 + frame-master;
99 + bitclock-master;
100 + };
101 + };
102 +
103 + firmware {
104 + optee {
105 + compatible = "linaro,optee-tz";
106 + method = "smc";
107 + };
108 + };
109 +};
110 +
111 +&enet0 {
112 + tbi-handle = <&tbi1>;
113 + phy-handle = <&phy1>;
114 + phy-connection-type = "sgmii";
115 + status = "okay";
116 +};
117 +
118 +&enet1 {
119 + tbi-handle = <&tbi1>;
120 + phy-handle = <&phy3>;
121 + phy-connection-type = "sgmii";
122 + status = "okay";
123 +};
124 +
125 +&enet2 {
126 + fixed-link = <0 1 1000 0 0>;
127 + phy-connection-type = "rgmii-id";
128 + status = "okay";
129 +};
130 +
131 +&can0{
132 + status = "disabled";
133 +};
134 +
135 +&can1{
136 + status = "disabled";
137 +};
138 +
139 +&can2{
140 + status = "disabled";
141 +};
142 +
143 +&can3{
144 + status = "okay";
145 +};
146 +
147 +&esdhc{
148 + status = "okay";
149 +};
150 +
151 +&i2c0 {
152 + status = "okay";
153 +
154 + max1239@35 {
155 + compatible = "maxim,max1239";
156 + reg = <0x35>;
157 + #io-channel-cells = <1>;
158 + };
159 +
160 + codec: sgtl5000@2a {
161 + #sound-dai-cells=<0x0>;
162 + compatible = "fsl,sgtl5000";
163 + reg = <0x2a>;
164 + VDDA-supply = <&reg_3p3v>;
165 + VDDIO-supply = <&reg_2p5v>;
166 + clocks = <&sys_mclk 1>;
167 + };
168 +
169 + pca9555: pca9555@23 {
170 + compatible = "nxp,pca9555";
171 + /*pinctrl-names = "default";*/
172 + /*interrupt-parent = <&gpio2>;
173 + interrupts = <19 0x2>;*/
174 + gpio-controller;
175 + #gpio-cells = <2>;
176 + interrupt-controller;
177 + #interrupt-cells = <2>;
178 + reg = <0x23>;
179 + };
180 +
181 + ina220@44 {
182 + compatible = "ti,ina220";
183 + reg = <0x44>;
184 + shunt-resistor = <1000>;
185 + };
186 +
187 + ina220@45 {
188 + compatible = "ti,ina220";
189 + reg = <0x45>;
190 + shunt-resistor = <1000>;
191 + };
192 +
193 + lm75b@48 {
194 + compatible = "nxp,lm75a";
195 + reg = <0x48>;
196 + };
197 +
198 + adt7461a@4c {
199 + compatible = "adt7461a";
200 + reg = <0x4c>;
201 + };
202 +
203 + hdmi: sii9022a@39 {
204 + compatible = "fsl,sii902x";
205 + reg = <0x39>;
206 + interrupts = <GIC_SPI 163 IRQ_TYPE_EDGE_RISING>;
207 + };
208 +};
209 +
210 +&i2c1 {
211 + status = "disabled";
212 +};
213 +
214 +&ifc {
215 + status = "disabled";
216 +};
217 +
218 +&lpuart0 {
219 + status = "okay";
220 +};
221 +
222 +&mdio0 {
223 + phy0: ethernet-phy@0 {
224 + reg = <0x0>;
225 + };
226 + phy1: ethernet-phy@1 {
227 + reg = <0x1>;
228 + };
229 + phy2: ethernet-phy@2 {
230 + reg = <0x2>;
231 + };
232 + phy3: ethernet-phy@3 {
233 + reg = <0x3>;
234 + };
235 + tbi1: tbi-phy@1f {
236 + reg = <0x1f>;
237 + device_type = "tbi-phy";
238 + };
239 +};
240 +
241 +&qspi {
242 + num-cs = <2>;
243 + status = "okay";
244 +
245 + qflash0: s25fl128s@0 {
246 + compatible = "spansion,s25fl129p1";
247 + #address-cells = <1>;
248 + #size-cells = <1>;
249 + spi-max-frequency = <20000000>;
250 + reg = <0>;
251 + };
252 +};
253 +
254 +&sai2 {
255 + status = "okay";
256 +};
257 +
258 +&uart0 {
259 + status = "okay";
260 +};
261 +
262 +&uart1 {
263 + status = "okay";
264 +};
265 +
266 +&dcu {
267 + display = <&display>;
268 + status = "okay";
269 +
270 + display: display@0 {
271 + bits-per-pixel = <24>;
272 +
273 + display-timings {
274 + native-mode = <&timing0>;
275 +
276 + timing0: mode0 {
277 + clock-frequency = <25000000>;
278 + hactive = <640>;
279 + vactive = <480>;
280 + hback-porch = <80>;
281 + hfront-porch = <80>;
282 + vback-porch = <16>;
283 + vfront-porch = <16>;
284 + hsync-len = <12>;
285 + vsync-len = <2>;
286 + hsync-active = <1>;
287 + vsync-active = <1>;
288 + };
289 + };
290 + };
291 +};