git.openwrt.org Git - openwrt/staging/dedeckeh.git/blob

   1 From 138c126a33f7564edb66b1da5b847e4a60740bfc Mon Sep 17 00:00:00 2001
   2 From: DENG Qingfang <dqfext@gmail.com>
   3 Date: Wed, 4 Aug 2021 00:04:04 +0800
   4 Subject: [PATCH] net: dsa: mt7530: always install FDB entries with IVL and FID
   5  1
   6
   7 This reverts commit 7e777021780e ("mt7530 mt7530_fdb_write only set ivl
   8 bit vid larger than 1").
   9
  10 Before this series, the default value of all ports' PVID is 1, which is
  11 copied into the FDB entry, even if the ports are VLAN unaware. So
  12 `bridge fdb show` will show entries like `dev swp0 vlan 1 self` even on
  13 a VLAN-unaware bridge.
  14
  15 The blamed commit does not solve that issue completely, instead it may
  16 cause a new issue that FDB is inaccessible in a VLAN-aware bridge with
  17 PVID 1.
  18
  19 This series sets PVID to 0 on VLAN-unaware ports, so `bridge fdb show`
  20 will no longer print `vlan 1` on VLAN-unaware bridges, and that special
  21 case in fdb_write is not required anymore.
  22
  23 Set FDB entries' filter ID to 1 to match the VLAN table.
  24
  25 Signed-off-by: DENG Qingfang <dqfext@gmail.com>
  26 Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
  27 Signed-off-by: David S. Miller <davem@davemloft.net>
  28 ---
  29  drivers/net/dsa/mt7530.c | 2 ++
  30  drivers/net/dsa/mt7530.h | 2 ++
  31  2 files changed, 4 insertions(+)
  32
  33 --- a/drivers/net/dsa/mt7530.c
  34 +++ b/drivers/net/dsa/mt7530.c
  35 @@ -361,6 +361,8 @@ mt7530_fdb_write(struct mt7530_priv *pri
  36         int i;
  37
  38         reg[1] |= vid & CVID_MASK;
  39 +       reg[1] |= ATA2_IVL;
  40 +       reg[1] |= ATA2_FID(FID_BRIDGED);
  41         reg[2] |= (aging & AGE_TIMER_MASK) << AGE_TIMER;
  42         reg[2] |= (port_mask & PORT_MAP_MASK) << PORT_MAP;
  43         /* STATIC_ENT indicate that entry is static wouldn't
  44 --- a/drivers/net/dsa/mt7530.h
  45 +++ b/drivers/net/dsa/mt7530.h
  46 @@ -77,6 +77,8 @@ enum mt753x_bpdu_port_fw {
  47  #define  STATIC_EMP                    0
  48  #define  STATIC_ENT                    3
  49  #define MT7530_ATA2                    0x78
  50 +#define  ATA2_IVL                      BIT(15)
  51 +#define  ATA2_FID(x)                   (((x) & 0x7) << 12)
  52
  53  /* Register for address table write data */
  54  #define MT7530_ATWD                    0x7c