git.openwrt.org Git - openwrt/staging/stintel.git/blob

   1 From 1c2211cb15dd3957fb26c0e1615eceb5db851ad6 Mon Sep 17 00:00:00 2001
   2 From: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
   3 Date: Mon, 11 Apr 2022 10:46:22 +0100
   4 Subject: [PATCH 06/13] net: dsa: mt7530: switch to use phylink_get_linkmodes()
   5 MIME-Version: 1.0
   6 Content-Type: text/plain; charset=UTF-8
   7 Content-Transfer-Encoding: 8bit
   8
   9 Switch mt7530 to use phylink_get_linkmodes() to generate the ethtool
  10 linkmodes that can be supported. We are unable to use the generic
  11 helper for this as pause modes are dependent on the interface as
  12 the Autoneg bit depends on the interface mode.
  13
  14 Tested-by: Marek Behún <kabel@kernel.org>
  15 Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
  16 Signed-off-by: Paolo Abeni <pabeni@redhat.com>
  17 ---
  18  drivers/net/dsa/mt7530.c | 57 ++++------------------------------------
  19  1 file changed, 5 insertions(+), 52 deletions(-)
  20
  21 --- a/drivers/net/dsa/mt7530.c
  22 +++ b/drivers/net/dsa/mt7530.c
  23 @@ -2544,19 +2544,6 @@ static int mt7531_rgmii_setup(struct mt7
  24         return 0;
  25  }
  26
  27 -static void mt7531_sgmii_validate(struct mt7530_priv *priv, int port,
  28 -                                 phy_interface_t interface,
  29 -                                 unsigned long *supported)
  30 -{
  31 -       /* Port5 supports ethier RGMII or SGMII.
  32 -        * Port6 supports SGMII only.
  33 -        */
  34 -       if (port == 6 && interface == PHY_INTERFACE_MODE_2500BASEX) {
  35 -               phylink_set(supported, 2500baseX_Full);
  36 -               phylink_set(supported, 2500baseT_Full);
  37 -       }
  38 -}
  39 -
  40  static void
  41  mt7531_sgmii_link_up_force(struct dsa_switch *ds, int port,
  42                            unsigned int mode, phy_interface_t interface,
  43 @@ -2923,51 +2910,21 @@ static void mt753x_phylink_get_caps(stru
  44  }
  45
  46  static void
  47 -mt7530_mac_port_validate(struct dsa_switch *ds, int port,
  48 -                        phy_interface_t interface,
  49 -                        unsigned long *supported)
  50 -{
  51 -}
  52 -
  53 -static void mt7531_mac_port_validate(struct dsa_switch *ds, int port,
  54 -                                    phy_interface_t interface,
  55 -                                    unsigned long *supported)
  56 -{
  57 -       struct mt7530_priv *priv = ds->priv;
  58 -
  59 -       mt7531_sgmii_validate(priv, port, interface, supported);
  60 -}
  61 -
  62 -static void
  63  mt753x_phylink_validate(struct dsa_switch *ds, int port,
  64                         unsigned long *supported,
  65                         struct phylink_link_state *state)
  66  {
  67         __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
  68 -       struct mt7530_priv *priv = ds->priv;
  69 +       u32 caps;
  70 +
  71 +       caps = dsa_to_port(ds, port)->pl_config.mac_capabilities;
  72
  73         phylink_set_port_modes(mask);
  74 +       phylink_get_linkmodes(mask, state->interface, caps);
  75
  76         if (state->interface != PHY_INTERFACE_MODE_TRGMII &&
  77 -           !phy_interface_mode_is_8023z(state->interface)) {
  78 -               phylink_set(mask, 10baseT_Half);
  79 -               phylink_set(mask, 10baseT_Full);
  80 -               phylink_set(mask, 100baseT_Half);
  81 -               phylink_set(mask, 100baseT_Full);
  82 +           !phy_interface_mode_is_8023z(state->interface))
  83                 phylink_set(mask, Autoneg);
  84 -       }
  85 -
  86 -       /* This switch only supports 1G full-duplex. */
  87 -       if (state->interface != PHY_INTERFACE_MODE_MII &&
  88 -           state->interface != PHY_INTERFACE_MODE_2500BASEX) {
  89 -               phylink_set(mask, 1000baseT_Full);
  90 -               phylink_set(mask, 1000baseX_Full);
  91 -       }
  92 -
  93 -       priv->info->mac_port_validate(ds, port, state->interface, mask);
  94 -
  95 -       phylink_set(mask, Pause);
  96 -       phylink_set(mask, Asym_Pause);
  97
  98         linkmode_and(supported, supported, mask);
  99         linkmode_and(state->advertising, state->advertising, mask);
 100 @@ -3168,7 +3125,6 @@ static const struct mt753x_info mt753x_t
 101                 .phy_write = mt7530_phy_write,
 102                 .pad_setup = mt7530_pad_clk_setup,
 103                 .mac_port_get_caps = mt7530_mac_port_get_caps,
 104 -               .mac_port_validate = mt7530_mac_port_validate,
 105                 .mac_port_get_state = mt7530_phylink_mac_link_state,
 106                 .mac_port_config = mt7530_mac_config,
 107         },
 108 @@ -3179,7 +3135,6 @@ static const struct mt753x_info mt753x_t
 109                 .phy_write = mt7530_phy_write,
 110                 .pad_setup = mt7530_pad_clk_setup,
 111                 .mac_port_get_caps = mt7530_mac_port_get_caps,
 112 -               .mac_port_validate = mt7530_mac_port_validate,
 113                 .mac_port_get_state = mt7530_phylink_mac_link_state,
 114                 .mac_port_config = mt7530_mac_config,
 115         },
 116 @@ -3191,7 +3146,6 @@ static const struct mt753x_info mt753x_t
 117                 .pad_setup = mt7531_pad_setup,
 118                 .cpu_port_config = mt7531_cpu_port_config,
 119                 .mac_port_get_caps = mt7531_mac_port_get_caps,
 120 -               .mac_port_validate = mt7531_mac_port_validate,
 121                 .mac_port_get_state = mt7531_phylink_mac_link_state,
 122                 .mac_port_config = mt7531_mac_config,
 123                 .mac_pcs_an_restart = mt7531_sgmii_restart_an,
 124 @@ -3253,7 +3207,6 @@ mt7530_probe(struct mdio_device *mdiodev
 125         if (!priv->info->sw_setup || !priv->info->pad_setup ||
 126             !priv->info->phy_read || !priv->info->phy_write ||
 127             !priv->info->mac_port_get_caps ||
 128 -           !priv->info->mac_port_validate ||
 129             !priv->info->mac_port_get_state || !priv->info->mac_port_config)
 130                 return -EINVAL;
 131