git.openwrt.org Git - openwrt/staging/dangole.git/blob

   1 From e0afa16cad94b26e13d673647b781dd336cb30bc Mon Sep 17 00:00:00 2001
   2 From: Wen He <wen.he_1@nxp.com>
   3 Date: Mon, 14 Oct 2019 14:25:42 +0800
   4 Subject: [PATCH] arm64: dts: ls1028a: Add properties for HD Display controller
   5  node
   6
   7 The HD Display controller includes DP TX CTRL and DPHY, their offers
   8 multi-protocol support of standards such as DisplayPort and eDP, with
   9 one of these standards supported at a time.
  10
  11 This patch enables the HD Display controller driver on the LS1028A.
  12
  13 Signed-off-by: Wen He <wen.he_1@nxp.com>
  14 ---
  15  arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 16 ++++++++++++++++
  16  1 file changed, 16 insertions(+)
  17
  18 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
  19 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
  20 @@ -856,7 +856,23 @@
  21
  22                 port {
  23                         dp0_out: endpoint {
  24 +                               remote-endpoint = <&dp1_out>;
  25 +                       };
  26 +               };
  27 +       };
  28
  29 +       hdptx0: display@f200000 {
  30 +               compatible = "cdn,ls1028a-dp";
  31 +               reg = <0x0 0xf200000 0x0 0xfffff>;
  32 +               interrupts = <0 221 IRQ_TYPE_LEVEL_HIGH>;
  33 +               clocks = <&clockgen 2 2>, <&clockgen 2 2>, <&clockgen 2 2>,
  34 +                        <&clockgen 2 2>, <&clockgen 2 2>, <&dpclk>;
  35 +               clock-names = "clk_core", "pclk", "sclk",
  36 +                             "cclk", "clk_vif", "clk_pxl";
  37 +
  38 +               port {
  39 +                       dp1_out: endpoint {
  40 +                               remote-endpoint = <&dp0_out>;
  41                         };
  42                 };
  43         };