9534bdc3dddb59d6bc0e6f8e3c15d937232350e4
[openwrt/staging/jow.git] /
1 From da5a7765a20d34508036ba8ed1db87e546abcf4b Mon Sep 17 00:00:00 2001
2 From: Yuantian Tang <andy.tang@nxp.com>
3 Date: Mon, 25 May 2020 17:33:22 +0800
4 Subject: [PATCH] thermal: qoriq: Update the settings for TMUv2
5
6 For TMU v2, TMSAR registers need to be set properly to get the
7 accurate temperature values.
8 Also the temperature read needs to be converted to degree Celsius
9 since it is in degrees Kelvin.
10
11 Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
12 ---
13 drivers/thermal/qoriq_thermal.c | 21 +++++++++++++++++++--
14 1 file changed, 19 insertions(+), 2 deletions(-)
15
16 diff --git a/drivers/thermal/qoriq_thermal.c b/drivers/thermal/qoriq_thermal.c
17 index ba7d6105a..8b371fd3d 100644
18 --- a/drivers/thermal/qoriq_thermal.c
19 +++ b/drivers/thermal/qoriq_thermal.c
20 @@ -23,6 +23,7 @@
21 #define TMTMIR_DEFAULT 0x0000000f
22 #define TIER_DISABLE 0x0
23 #define TEUMR0_V2 0x51009c00
24 +#define TMSARA_V2 0xe
25 #define TMU_VER1 0x1
26 #define TMU_VER2 0x2
27
28 @@ -35,6 +36,13 @@ struct qoriq_tmu_site_regs {
29 u8 res0[0x8];
30 };
31
32 +struct qoriq_tmu_tmsar {
33 + u32 res0;
34 + u32 tmsar;
35 + u32 res1;
36 + u32 res2;
37 +};
38 +
39 struct qoriq_tmu_regs_v1 {
40 u32 tmr; /* Mode Register */
41 u32 tsr; /* Status Register */
42 @@ -95,7 +103,9 @@ struct qoriq_tmu_regs_v2 {
43 u32 tscfgr; /* Sensor Configuration Register */
44 u8 res6[0x78];
45 struct qoriq_tmu_site_regs site[SITES_MAX];
46 - u8 res7[0x9f8];
47 + u8 res10[0x100];
48 + struct qoriq_tmu_tmsar tmsar[16];
49 + u8 res7[0x7f8];
50 u32 ipbrr0; /* IP Block Revision Register 0 */
51 u32 ipbrr1; /* IP Block Revision Register 1 */
52 u8 res8[0x300];
53 @@ -158,7 +168,10 @@ static int tmu_get_temp(void *p, int *temp)
54 u32 val;
55
56 val = tmu_read(qdata, &qdata->regs->site[qsensor->id].tritsr);
57 - *temp = (val & 0xff) * 1000;
58 + if (qdata->ver == TMU_VER1)
59 + *temp = (val & 0xff) * 1000;
60 + else
61 + *temp = (val & 0x1ff) * 1000 - 273150;
62
63 return 0;
64 }
65 @@ -319,6 +332,8 @@ static int qoriq_tmu_calibration(struct platform_device *pdev)
66
67 static void qoriq_tmu_init_device(struct qoriq_tmu_data *data)
68 {
69 + int i;
70 +
71 /* Disable interrupt, using polling instead */
72 tmu_write(data, TIER_DISABLE, &data->regs->tier);
73
74 @@ -328,6 +343,8 @@ static void qoriq_tmu_init_device(struct qoriq_tmu_data *data)
75 } else {
76 tmu_write(data, TMTMIR_DEFAULT, &data->regs_v2->tmtmir);
77 tmu_write(data, TEUMR0_V2, &data->regs_v2->teumr0);
78 + for (i = 0; i < 7; i++)
79 + tmu_write(data, TMSARA_V2, &data->regs_v2->tmsar[i].tmsar);
80 }
81
82 /* Disable monitoring */
83 --
84 2.17.1
85