94451fd636f3c844b5348612944b01dcb7c5b05b
[openwrt/staging/stintel.git] /
1 From 89da22456af0762477d8c1345fdd17961b3ada80 Mon Sep 17 00:00:00 2001
2 From: Christian Marangi <ansuelsmth@gmail.com>
3 Date: Wed, 20 Dec 2023 23:17:23 +0100
4 Subject: [PATCH 2/2] clk: qcom: clk-rcg2: add support for rcg2 freq multi ops
5
6 Some RCG frequency can be reached by multiple configuration.
7
8 Add clk_rcg2_fm_ops ops to support these special RCG configurations.
9
10 These alternative ops will select the frequency using a CEIL policy.
11
12 When the correct frequency is found, the correct config is selected by
13 calculating the final rate (by checking the defined parent and values
14 in the config that is being checked) and deciding based on the one that
15 is less different than the requested one.
16
17 These check are skipped if there is just one config for the requested
18 freq.
19
20 qcom_find_freq_multi is added to search the freq with the new struct
21 freq_multi_tbl.
22 __clk_rcg2_select_conf is used to select the correct conf by simulating
23 the final clock.
24 If a conf can't be found due to parent not reachable, a WARN is printed
25 and -EINVAL is returned.
26
27 Tested-by: Wei Lei <quic_leiwei@quicinc.com>
28 Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
29 Acked-by: Stephen Boyd <sboyd@kernel.org>
30 Link: https://lore.kernel.org/r/20231220221724.3822-3-ansuelsmth@gmail.com
31 Signed-off-by: Bjorn Andersson <andersson@kernel.org>
32 ---
33 drivers/clk/qcom/clk-rcg.h | 1 +
34 drivers/clk/qcom/clk-rcg2.c | 166 ++++++++++++++++++++++++++++++++++++
35 drivers/clk/qcom/common.c | 18 ++++
36 drivers/clk/qcom/common.h | 2 +
37 4 files changed, 187 insertions(+)
38
39 diff --git a/drivers/clk/qcom/clk-rcg.h b/drivers/clk/qcom/clk-rcg.h
40 index c50e6616d02c..d7414361e432 100644
41 --- a/drivers/clk/qcom/clk-rcg.h
42 +++ b/drivers/clk/qcom/clk-rcg.h
43 @@ -190,6 +190,7 @@ struct clk_rcg2_gfx3d {
44
45 extern const struct clk_ops clk_rcg2_ops;
46 extern const struct clk_ops clk_rcg2_floor_ops;
47 +extern const struct clk_ops clk_rcg2_fm_ops;
48 extern const struct clk_ops clk_rcg2_mux_closest_ops;
49 extern const struct clk_ops clk_edp_pixel_ops;
50 extern const struct clk_ops clk_byte_ops;
51 diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c
52 index 5183c74b074f..9b3aaa7f20ac 100644
53 --- a/drivers/clk/qcom/clk-rcg2.c
54 +++ b/drivers/clk/qcom/clk-rcg2.c
55 @@ -260,6 +260,115 @@ static int _freq_tbl_determine_rate(struct clk_hw *hw, const struct freq_tbl *f,
56 return 0;
57 }
58
59 +static const struct freq_conf *
60 +__clk_rcg2_select_conf(struct clk_hw *hw, const struct freq_multi_tbl *f,
61 + unsigned long req_rate)
62 +{
63 + unsigned long rate_diff, best_rate_diff = ULONG_MAX;
64 + const struct freq_conf *conf, *best_conf = NULL;
65 + struct clk_rcg2 *rcg = to_clk_rcg2(hw);
66 + const char *name = clk_hw_get_name(hw);
67 + unsigned long parent_rate, rate;
68 + struct clk_hw *p;
69 + int index, i;
70 +
71 + /* Exit early if only one config is defined */
72 + if (f->num_confs == 1) {
73 + best_conf = f->confs;
74 + goto exit;
75 + }
76 +
77 + /* Search in each provided config the one that is near the wanted rate */
78 + for (i = 0, conf = f->confs; i < f->num_confs; i++, conf++) {
79 + index = qcom_find_src_index(hw, rcg->parent_map, conf->src);
80 + if (index < 0)
81 + continue;
82 +
83 + p = clk_hw_get_parent_by_index(hw, index);
84 + if (!p)
85 + continue;
86 +
87 + parent_rate = clk_hw_get_rate(p);
88 + rate = calc_rate(parent_rate, conf->n, conf->m, conf->n, conf->pre_div);
89 +
90 + if (rate == req_rate) {
91 + best_conf = conf;
92 + goto exit;
93 + }
94 +
95 + rate_diff = abs_diff(req_rate, rate);
96 + if (rate_diff < best_rate_diff) {
97 + best_rate_diff = rate_diff;
98 + best_conf = conf;
99 + }
100 + }
101 +
102 + /*
103 + * Very unlikely. Warn if we couldn't find a correct config
104 + * due to parent not found in every config.
105 + */
106 + if (unlikely(!best_conf)) {
107 + WARN(1, "%s: can't find a configuration for rate %lu\n",
108 + name, req_rate);
109 + return ERR_PTR(-EINVAL);
110 + }
111 +
112 +exit:
113 + return best_conf;
114 +}
115 +
116 +static int _freq_tbl_fm_determine_rate(struct clk_hw *hw, const struct freq_multi_tbl *f,
117 + struct clk_rate_request *req)
118 +{
119 + unsigned long clk_flags, rate = req->rate;
120 + struct clk_rcg2 *rcg = to_clk_rcg2(hw);
121 + const struct freq_conf *conf;
122 + struct clk_hw *p;
123 + int index;
124 +
125 + f = qcom_find_freq_multi(f, rate);
126 + if (!f || !f->confs)
127 + return -EINVAL;
128 +
129 + conf = __clk_rcg2_select_conf(hw, f, rate);
130 + if (IS_ERR(conf))
131 + return PTR_ERR(conf);
132 + index = qcom_find_src_index(hw, rcg->parent_map, conf->src);
133 + if (index < 0)
134 + return index;
135 +
136 + clk_flags = clk_hw_get_flags(hw);
137 + p = clk_hw_get_parent_by_index(hw, index);
138 + if (!p)
139 + return -EINVAL;
140 +
141 + if (clk_flags & CLK_SET_RATE_PARENT) {
142 + rate = f->freq;
143 + if (conf->pre_div) {
144 + if (!rate)
145 + rate = req->rate;
146 + rate /= 2;
147 + rate *= conf->pre_div + 1;
148 + }
149 +
150 + if (conf->n) {
151 + u64 tmp = rate;
152 +
153 + tmp = tmp * conf->n;
154 + do_div(tmp, conf->m);
155 + rate = tmp;
156 + }
157 + } else {
158 + rate = clk_hw_get_rate(p);
159 + }
160 +
161 + req->best_parent_hw = p;
162 + req->best_parent_rate = rate;
163 + req->rate = f->freq;
164 +
165 + return 0;
166 +}
167 +
168 static int clk_rcg2_determine_rate(struct clk_hw *hw,
169 struct clk_rate_request *req)
170 {
171 @@ -276,6 +385,14 @@ static int clk_rcg2_determine_floor_rate(struct clk_hw *hw,
172 return _freq_tbl_determine_rate(hw, rcg->freq_tbl, req, FLOOR);
173 }
174
175 +static int clk_rcg2_fm_determine_rate(struct clk_hw *hw,
176 + struct clk_rate_request *req)
177 +{
178 + struct clk_rcg2 *rcg = to_clk_rcg2(hw);
179 +
180 + return _freq_tbl_fm_determine_rate(hw, rcg->freq_multi_tbl, req);
181 +}
182 +
183 static int __clk_rcg2_configure(struct clk_rcg2 *rcg, const struct freq_tbl *f,
184 u32 *_cfg)
185 {
186 @@ -371,6 +488,30 @@ static int __clk_rcg2_set_rate(struct clk_hw *hw, unsigned long rate,
187 return clk_rcg2_configure(rcg, f);
188 }
189
190 +static int __clk_rcg2_fm_set_rate(struct clk_hw *hw, unsigned long rate)
191 +{
192 + struct clk_rcg2 *rcg = to_clk_rcg2(hw);
193 + const struct freq_multi_tbl *f;
194 + const struct freq_conf *conf;
195 + struct freq_tbl f_tbl = {};
196 +
197 + f = qcom_find_freq_multi(rcg->freq_multi_tbl, rate);
198 + if (!f || !f->confs)
199 + return -EINVAL;
200 +
201 + conf = __clk_rcg2_select_conf(hw, f, rate);
202 + if (IS_ERR(conf))
203 + return PTR_ERR(conf);
204 +
205 + f_tbl.freq = f->freq;
206 + f_tbl.src = conf->src;
207 + f_tbl.pre_div = conf->pre_div;
208 + f_tbl.m = conf->m;
209 + f_tbl.n = conf->n;
210 +
211 + return clk_rcg2_configure(rcg, &f_tbl);
212 +}
213 +
214 static int clk_rcg2_set_rate(struct clk_hw *hw, unsigned long rate,
215 unsigned long parent_rate)
216 {
217 @@ -383,6 +524,12 @@ static int clk_rcg2_set_floor_rate(struct clk_hw *hw, unsigned long rate,
218 return __clk_rcg2_set_rate(hw, rate, FLOOR);
219 }
220
221 +static int clk_rcg2_fm_set_rate(struct clk_hw *hw, unsigned long rate,
222 + unsigned long parent_rate)
223 +{
224 + return __clk_rcg2_fm_set_rate(hw, rate);
225 +}
226 +
227 static int clk_rcg2_set_rate_and_parent(struct clk_hw *hw,
228 unsigned long rate, unsigned long parent_rate, u8 index)
229 {
230 @@ -395,6 +542,12 @@ static int clk_rcg2_set_floor_rate_and_parent(struct clk_hw *hw,
231 return __clk_rcg2_set_rate(hw, rate, FLOOR);
232 }
233
234 +static int clk_rcg2_fm_set_rate_and_parent(struct clk_hw *hw,
235 + unsigned long rate, unsigned long parent_rate, u8 index)
236 +{
237 + return __clk_rcg2_fm_set_rate(hw, rate);
238 +}
239 +
240 static int clk_rcg2_get_duty_cycle(struct clk_hw *hw, struct clk_duty *duty)
241 {
242 struct clk_rcg2 *rcg = to_clk_rcg2(hw);
243 @@ -505,6 +658,19 @@ const struct clk_ops clk_rcg2_floor_ops = {
244 };
245 EXPORT_SYMBOL_GPL(clk_rcg2_floor_ops);
246
247 +const struct clk_ops clk_rcg2_fm_ops = {
248 + .is_enabled = clk_rcg2_is_enabled,
249 + .get_parent = clk_rcg2_get_parent,
250 + .set_parent = clk_rcg2_set_parent,
251 + .recalc_rate = clk_rcg2_recalc_rate,
252 + .determine_rate = clk_rcg2_fm_determine_rate,
253 + .set_rate = clk_rcg2_fm_set_rate,
254 + .set_rate_and_parent = clk_rcg2_fm_set_rate_and_parent,
255 + .get_duty_cycle = clk_rcg2_get_duty_cycle,
256 + .set_duty_cycle = clk_rcg2_set_duty_cycle,
257 +};
258 +EXPORT_SYMBOL_GPL(clk_rcg2_fm_ops);
259 +
260 const struct clk_ops clk_rcg2_mux_closest_ops = {
261 .determine_rate = __clk_mux_determine_rate_closest,
262 .get_parent = clk_rcg2_get_parent,
263 diff --git a/drivers/clk/qcom/common.c b/drivers/clk/qcom/common.c
264 index 75f09e6e057e..48f81e3a5e80 100644
265 --- a/drivers/clk/qcom/common.c
266 +++ b/drivers/clk/qcom/common.c
267 @@ -41,6 +41,24 @@ struct freq_tbl *qcom_find_freq(const struct freq_tbl *f, unsigned long rate)
268 }
269 EXPORT_SYMBOL_GPL(qcom_find_freq);
270
271 +const struct freq_multi_tbl *qcom_find_freq_multi(const struct freq_multi_tbl *f,
272 + unsigned long rate)
273 +{
274 + if (!f)
275 + return NULL;
276 +
277 + if (!f->freq)
278 + return f;
279 +
280 + for (; f->freq; f++)
281 + if (rate <= f->freq)
282 + return f;
283 +
284 + /* Default to our fastest rate */
285 + return f - 1;
286 +}
287 +EXPORT_SYMBOL_GPL(qcom_find_freq_multi);
288 +
289 const struct freq_tbl *qcom_find_freq_floor(const struct freq_tbl *f,
290 unsigned long rate)
291 {
292 diff --git a/drivers/clk/qcom/common.h b/drivers/clk/qcom/common.h
293 index 9c8f7b798d9f..2d4a8a837e6c 100644
294 --- a/drivers/clk/qcom/common.h
295 +++ b/drivers/clk/qcom/common.h
296 @@ -45,6 +45,8 @@ extern const struct freq_tbl *qcom_find_freq(const struct freq_tbl *f,
297 unsigned long rate);
298 extern const struct freq_tbl *qcom_find_freq_floor(const struct freq_tbl *f,
299 unsigned long rate);
300 +extern const struct freq_multi_tbl *qcom_find_freq_multi(const struct freq_multi_tbl *f,
301 + unsigned long rate);
302 extern void
303 qcom_pll_set_fsm_mode(struct regmap *m, u32 reg, u8 bias_count, u8 lock_count);
304 extern int qcom_find_src_index(struct clk_hw *hw, const struct parent_map *map,
305 --
306 2.45.2
307