9122960712105d4f94ff9e6d4037a940222816da
[openwrt/staging/xback.git] /
1 From 68690045f8e220826517c0d6f9388ffc1faa57ea Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?Alexis=20Lothor=C3=A9?= <alexis.lothore@bootlin.com>
3 Date: Mon, 29 May 2023 10:02:45 +0200
4 Subject: [PATCH 897/898] net: dsa: mv88e6xxx: pass mv88e6xxx_chip structure to
5 port_max_speed_mode
6 MIME-Version: 1.0
7 Content-Type: text/plain; charset=UTF-8
8 Content-Transfer-Encoding: 8bit
9
10 Some switches families have minor differences on supported link speed for
11 ports. Instead of redefining a new port_max_speed_mode for each different
12 configuration, allow to pass mv88e6xxx_chip structure to allow
13 differentiating those chips by known chip id
14
15 Signed-off-by: Alexis Lothoré <alexis.lothore@bootlin.com>
16 Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
17 Signed-off-by: Jakub Kicinski <kuba@kernel.org>
18 Update one more instance of port_max_speed_mode that 5.15 has.
19 [Robert Marko]
20 Signed-off-by: Robert Marko <robimarko@gmail.com>
21 ---
22 drivers/net/dsa/mv88e6xxx/chip.c | 2 +-
23 drivers/net/dsa/mv88e6xxx/chip.h | 3 ++-
24 drivers/net/dsa/mv88e6xxx/port.c | 12 ++++++++----
25 drivers/net/dsa/mv88e6xxx/port.h | 12 ++++++++----
26 4 files changed, 19 insertions(+), 10 deletions(-)
27
28 --- a/drivers/net/dsa/mv88e6xxx/chip.c
29 +++ b/drivers/net/dsa/mv88e6xxx/chip.c
30 @@ -443,7 +443,7 @@ static int mv88e6xxx_port_setup_mac(stru
31 }
32
33 if (speed == SPEED_MAX && chip->info->ops->port_max_speed_mode)
34 - mode = chip->info->ops->port_max_speed_mode(port);
35 + mode = chip->info->ops->port_max_speed_mode(chip, port);
36
37 if (chip->info->ops->port_set_pause) {
38 err = chip->info->ops->port_set_pause(chip, port, pause);
39 --- a/drivers/net/dsa/mv88e6xxx/chip.h
40 +++ b/drivers/net/dsa/mv88e6xxx/chip.h
41 @@ -491,7 +491,8 @@ struct mv88e6xxx_ops {
42 int speed, int duplex);
43
44 /* What interface mode should be used for maximum speed? */
45 - phy_interface_t (*port_max_speed_mode)(int port);
46 + phy_interface_t (*port_max_speed_mode)(struct mv88e6xxx_chip *chip,
47 + int port);
48
49 int (*port_tag_remap)(struct mv88e6xxx_chip *chip, int port);
50
51 --- a/drivers/net/dsa/mv88e6xxx/port.c
52 +++ b/drivers/net/dsa/mv88e6xxx/port.c
53 @@ -357,7 +357,8 @@ int mv88e6341_port_set_speed_duplex(stru
54 duplex);
55 }
56
57 -phy_interface_t mv88e6341_port_max_speed_mode(int port)
58 +phy_interface_t mv88e6341_port_max_speed_mode(struct mv88e6xxx_chip *chip,
59 + int port)
60 {
61 if (port == 5)
62 return PHY_INTERFACE_MODE_2500BASEX;
63 @@ -402,7 +403,8 @@ int mv88e6390_port_set_speed_duplex(stru
64 duplex);
65 }
66
67 -phy_interface_t mv88e6390_port_max_speed_mode(int port)
68 +phy_interface_t mv88e6390_port_max_speed_mode(struct mv88e6xxx_chip *chip,
69 + int port)
70 {
71 if (port == 9 || port == 10)
72 return PHY_INTERFACE_MODE_2500BASEX;
73 @@ -427,7 +429,8 @@ int mv88e6390x_port_set_speed_duplex(str
74 duplex);
75 }
76
77 -phy_interface_t mv88e6390x_port_max_speed_mode(int port)
78 +phy_interface_t mv88e6390x_port_max_speed_mode(struct mv88e6xxx_chip *chip,
79 + int port)
80 {
81 if (port == 9 || port == 10)
82 return PHY_INTERFACE_MODE_XAUI;
83 @@ -527,7 +530,8 @@ int mv88e6393x_port_set_speed_duplex(str
84 return 0;
85 }
86
87 -phy_interface_t mv88e6393x_port_max_speed_mode(int port)
88 +phy_interface_t mv88e6393x_port_max_speed_mode(struct mv88e6xxx_chip *chip,
89 + int port)
90 {
91 if (port == 0 || port == 9 || port == 10)
92 return PHY_INTERFACE_MODE_10GBASER;
93 --- a/drivers/net/dsa/mv88e6xxx/port.h
94 +++ b/drivers/net/dsa/mv88e6xxx/port.h
95 @@ -350,10 +350,14 @@ int mv88e6390x_port_set_speed_duplex(str
96 int mv88e6393x_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,
97 int speed, int duplex);
98
99 -phy_interface_t mv88e6341_port_max_speed_mode(int port);
100 -phy_interface_t mv88e6390_port_max_speed_mode(int port);
101 -phy_interface_t mv88e6390x_port_max_speed_mode(int port);
102 -phy_interface_t mv88e6393x_port_max_speed_mode(int port);
103 +phy_interface_t mv88e6341_port_max_speed_mode(struct mv88e6xxx_chip *chip,
104 + int port);
105 +phy_interface_t mv88e6390_port_max_speed_mode(struct mv88e6xxx_chip *chip,
106 + int port);
107 +phy_interface_t mv88e6390x_port_max_speed_mode(struct mv88e6xxx_chip *chip,
108 + int port);
109 +phy_interface_t mv88e6393x_port_max_speed_mode(struct mv88e6xxx_chip *chip,
110 + int port);
111
112 int mv88e6xxx_port_set_state(struct mv88e6xxx_chip *chip, int port, u8 state);
113