8fad64a5702aa0761871b097dfd34450d0f2b670
[openwrt/staging/dangole.git] /
1 From 7a768326fdba542144833b9198a6d0edab52fad2 Mon Sep 17 00:00:00 2001
2 From: Jia-Wei Chang <jia-wei.chang@mediatek.com>
3 Date: Fri, 8 Apr 2022 12:58:56 +0800
4 Subject: [PATCH 01/21] cpufreq: mediatek: Cleanup variables and error handling
5 in mtk_cpu_dvfs_info_init()
6
7 - Remove several unnecessary varaibles in mtk_cpu_dvfs_info_init().
8 - Unify error message format and use dev_err_probe() if possible.
9
10 Signed-off-by: Jia-Wei Chang <jia-wei.chang@mediatek.com>
11 Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
12 Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
13 Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
14 ---
15 drivers/cpufreq/mediatek-cpufreq.c | 89 ++++++++++++------------------
16 1 file changed, 34 insertions(+), 55 deletions(-)
17
18 --- a/drivers/cpufreq/mediatek-cpufreq.c
19 +++ b/drivers/cpufreq/mediatek-cpufreq.c
20 @@ -302,96 +302,75 @@ static int mtk_cpufreq_set_target(struct
21 static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu)
22 {
23 struct device *cpu_dev;
24 - struct regulator *proc_reg = ERR_PTR(-ENODEV);
25 - struct regulator *sram_reg = ERR_PTR(-ENODEV);
26 - struct clk *cpu_clk = ERR_PTR(-ENODEV);
27 - struct clk *inter_clk = ERR_PTR(-ENODEV);
28 struct dev_pm_opp *opp;
29 unsigned long rate;
30 int ret;
31
32 cpu_dev = get_cpu_device(cpu);
33 if (!cpu_dev) {
34 - pr_err("failed to get cpu%d device\n", cpu);
35 + dev_err(cpu_dev, "failed to get cpu%d device\n", cpu);
36 return -ENODEV;
37 }
38 + info->cpu_dev = cpu_dev;
39
40 - cpu_clk = clk_get(cpu_dev, "cpu");
41 - if (IS_ERR(cpu_clk)) {
42 - if (PTR_ERR(cpu_clk) == -EPROBE_DEFER)
43 - pr_warn("cpu clk for cpu%d not ready, retry.\n", cpu);
44 - else
45 - pr_err("failed to get cpu clk for cpu%d\n", cpu);
46 -
47 - ret = PTR_ERR(cpu_clk);
48 - return ret;
49 - }
50 -
51 - inter_clk = clk_get(cpu_dev, "intermediate");
52 - if (IS_ERR(inter_clk)) {
53 - if (PTR_ERR(inter_clk) == -EPROBE_DEFER)
54 - pr_warn("intermediate clk for cpu%d not ready, retry.\n",
55 - cpu);
56 - else
57 - pr_err("failed to get intermediate clk for cpu%d\n",
58 - cpu);
59 + info->cpu_clk = clk_get(cpu_dev, "cpu");
60 + if (IS_ERR(info->cpu_clk)) {
61 + ret = PTR_ERR(info->cpu_clk);
62 + return dev_err_probe(cpu_dev, ret,
63 + "cpu%d: failed to get cpu clk\n", cpu);
64 + }
65
66 - ret = PTR_ERR(inter_clk);
67 + info->inter_clk = clk_get(cpu_dev, "intermediate");
68 + if (IS_ERR(info->inter_clk)) {
69 + ret = PTR_ERR(info->inter_clk);
70 + dev_err_probe(cpu_dev, ret,
71 + "cpu%d: failed to get intermediate clk\n", cpu);
72 goto out_free_resources;
73 }
74
75 - proc_reg = regulator_get_optional(cpu_dev, "proc");
76 - if (IS_ERR(proc_reg)) {
77 - if (PTR_ERR(proc_reg) == -EPROBE_DEFER)
78 - pr_warn("proc regulator for cpu%d not ready, retry.\n",
79 - cpu);
80 - else
81 - pr_err("failed to get proc regulator for cpu%d\n",
82 - cpu);
83 -
84 - ret = PTR_ERR(proc_reg);
85 + info->proc_reg = regulator_get_optional(cpu_dev, "proc");
86 + if (IS_ERR(info->proc_reg)) {
87 + ret = PTR_ERR(info->proc_reg);
88 + dev_err_probe(cpu_dev, ret,
89 + "cpu%d: failed to get proc regulator\n", cpu);
90 goto out_free_resources;
91 }
92
93 /* Both presence and absence of sram regulator are valid cases. */
94 - sram_reg = regulator_get_exclusive(cpu_dev, "sram");
95 + info->sram_reg = regulator_get_exclusive(cpu_dev, "sram");
96 + if (IS_ERR(info->sram_reg))
97 + info->sram_reg = NULL;
98
99 /* Get OPP-sharing information from "operating-points-v2" bindings */
100 ret = dev_pm_opp_of_get_sharing_cpus(cpu_dev, &info->cpus);
101 if (ret) {
102 - pr_err("failed to get OPP-sharing information for cpu%d\n",
103 - cpu);
104 + dev_err(cpu_dev,
105 + "cpu%d: failed to get OPP-sharing information\n", cpu);
106 goto out_free_resources;
107 }
108
109 ret = dev_pm_opp_of_cpumask_add_table(&info->cpus);
110 if (ret) {
111 - pr_warn("no OPP table for cpu%d\n", cpu);
112 + dev_warn(cpu_dev, "cpu%d: no OPP table\n", cpu);
113 goto out_free_resources;
114 }
115
116 /* Search a safe voltage for intermediate frequency. */
117 - rate = clk_get_rate(inter_clk);
118 + rate = clk_get_rate(info->inter_clk);
119 opp = dev_pm_opp_find_freq_ceil(cpu_dev, &rate);
120 if (IS_ERR(opp)) {
121 - pr_err("failed to get intermediate opp for cpu%d\n", cpu);
122 + dev_err(cpu_dev, "cpu%d: failed to get intermediate opp\n", cpu);
123 ret = PTR_ERR(opp);
124 goto out_free_opp_table;
125 }
126 info->intermediate_voltage = dev_pm_opp_get_voltage(opp);
127 dev_pm_opp_put(opp);
128
129 - info->cpu_dev = cpu_dev;
130 - info->proc_reg = proc_reg;
131 - info->sram_reg = IS_ERR(sram_reg) ? NULL : sram_reg;
132 - info->cpu_clk = cpu_clk;
133 - info->inter_clk = inter_clk;
134 -
135 /*
136 * If SRAM regulator is present, software "voltage tracking" is needed
137 * for this CPU power domain.
138 */
139 - info->need_voltage_tracking = !IS_ERR(sram_reg);
140 + info->need_voltage_tracking = (info->sram_reg != NULL);
141
142 return 0;
143
144 @@ -399,14 +378,14 @@ out_free_opp_table:
145 dev_pm_opp_of_cpumask_remove_table(&info->cpus);
146
147 out_free_resources:
148 - if (!IS_ERR(proc_reg))
149 - regulator_put(proc_reg);
150 - if (!IS_ERR(sram_reg))
151 - regulator_put(sram_reg);
152 - if (!IS_ERR(cpu_clk))
153 - clk_put(cpu_clk);
154 - if (!IS_ERR(inter_clk))
155 - clk_put(inter_clk);
156 + if (!IS_ERR(info->proc_reg))
157 + regulator_put(info->proc_reg);
158 + if (!IS_ERR(info->sram_reg))
159 + regulator_put(info->sram_reg);
160 + if (!IS_ERR(info->cpu_clk))
161 + clk_put(info->cpu_clk);
162 + if (!IS_ERR(info->inter_clk))
163 + clk_put(info->inter_clk);
164
165 return ret;
166 }