git.openwrt.org Git - openwrt/staging/xback.git/blob

   1 From 1b88c6ed26a1aa1d68d1661404e6e939709ff530 Mon Sep 17 00:00:00 2001
   2 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
   3 Date: Thu, 10 Dec 2020 08:21:54 +0100
   4 Subject: [PATCH 4/4] arm64: dts: broadcom: bcm4908: describe PCIe reset
   5  controller
   6 MIME-Version: 1.0
   7 Content-Type: text/plain; charset=UTF-8
   8 Content-Transfer-Encoding: 8bit
   9
  10 This reset controller is a single register in the Broadcom's MISC block.
  11
  12 Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
  13 Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
  14 ---
  15  arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 15 +++++++++++++++
  16  1 file changed, 15 insertions(+)
  17
  18 --- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
  19 +++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
  20 @@ -177,6 +177,21 @@
  21                         };
  22                 };
  23
  24 +               misc@2600 {
  25 +                       compatible = "brcm,misc", "simple-mfd";
  26 +                       reg = <0x2600 0xe4>;
  27 +
  28 +                       #address-cells = <1>;
  29 +                       #size-cells = <1>;
  30 +                       ranges = <0x00 0x2600 0xe4>;
  31 +
  32 +                       reset-controller@2644 {
  33 +                               compatible = "brcm,bcm4908-misc-pcie-reset";
  34 +                               reg = <0x44 0x04>;
  35 +                               #reset-cells = <1>;
  36 +                       };
  37 +               };
  38 +
  39                 reboot {
  40                         compatible = "syscon-reboot";
  41                         regmap = <&timer>;