git.openwrt.org Git - openwrt/staging/blocktrron.git/blob

   1 From 2cd02f2fdd8a92e5b6b85ff64eab0fc549b30c07 Mon Sep 17 00:00:00 2001
   2 From: Heiner Kallweit <hkallweit1@gmail.com>
   3 Date: Sat, 2 Nov 2024 14:49:01 +0100
   4 Subject: [PATCH] r8169: improve initialization of RSS registers on
   5  RTL8125/RTL8126
   6
   7 Replace the register addresses with the names used in r8125/r8126
   8 vendor driver, and consider that RSS_CTRL_8125 is a 32 bit register.
   9
  10 Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
  11 Link: https://patch.msgid.link/3bf2f340-b369-4174-97bf-fd38d4217492@gmail.com
  12 Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  13 ---
  14  drivers/net/ethernet/realtek/r8169_main.c | 6 ++++--
  15  1 file changed, 4 insertions(+), 2 deletions(-)
  16
  17 --- a/drivers/net/ethernet/realtek/r8169_main.c
  18 +++ b/drivers/net/ethernet/realtek/r8169_main.c
  19 @@ -347,6 +347,8 @@ enum rtl8125_registers {
  20         TxPoll_8125             = 0x90,
  21         LEDSEL3                 = 0x96,
  22         MAC0_BKP                = 0x19e0,
  23 +       RSS_CTRL_8125           = 0x4500,
  24 +       Q_NUM_CTRL_8125         = 0x4800,
  25         EEE_TXIDLE_TIMER_8125   = 0x6048,
  26  };
  27
  28 @@ -3770,8 +3772,8 @@ static void rtl_hw_start_8125_common(str
  29         rtl_pcie_state_l2l3_disable(tp);
  30
  31         RTL_W16(tp, 0x382, 0x221b);
  32 -       RTL_W8(tp, 0x4500, 0);
  33 -       RTL_W16(tp, 0x4800, 0);
  34 +       RTL_W32(tp, RSS_CTRL_8125, 0);
  35 +       RTL_W16(tp, Q_NUM_CTRL_8125, 0);
  36
  37         /* disable UPS */
  38         r8168_mac_ocp_modify(tp, 0xd40a, 0x0010, 0x0000);