8935eb673ae56c071dc168ca87aa3391399f12f5
[openwrt/openwrt.git] /
1 From: Felix Fietkau <nbd@nbd.name>
2 Date: Thu, 3 Nov 2022 17:49:44 +0100
3 Subject: [PATCH] net: ethernet: mediatek: ppe: assign per-port queues
4 for offloaded traffic
5
6 Keeps traffic sent to the switch within link speed limits
7
8 Signed-off-by: Felix Fietkau <nbd@nbd.name>
9 ---
10
11 --- a/drivers/net/ethernet/mediatek/mtk_ppe.c
12 +++ b/drivers/net/ethernet/mediatek/mtk_ppe.c
13 @@ -405,6 +405,24 @@ static inline bool mtk_foe_entry_usable(
14 FIELD_GET(MTK_FOE_IB1_STATE, entry->ib1) != MTK_FOE_STATE_BIND;
15 }
16
17 +int mtk_foe_entry_set_queue(struct mtk_eth *eth, struct mtk_foe_entry *entry,
18 + unsigned int queue)
19 +{
20 + u32 *ib2 = mtk_foe_entry_ib2(eth, entry);
21 +
22 + if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
23 + *ib2 &= ~MTK_FOE_IB2_QID_V2;
24 + *ib2 |= FIELD_PREP(MTK_FOE_IB2_QID_V2, queue);
25 + *ib2 |= MTK_FOE_IB2_PSE_QOS_V2;
26 + } else {
27 + *ib2 &= ~MTK_FOE_IB2_QID;
28 + *ib2 |= FIELD_PREP(MTK_FOE_IB2_QID, queue);
29 + *ib2 |= MTK_FOE_IB2_PSE_QOS;
30 + }
31 +
32 + return 0;
33 +}
34 +
35 static bool
36 mtk_flow_entry_match(struct mtk_eth *eth, struct mtk_flow_entry *entry,
37 struct mtk_foe_entry *data)
38 --- a/drivers/net/ethernet/mediatek/mtk_ppe.h
39 +++ b/drivers/net/ethernet/mediatek/mtk_ppe.h
40 @@ -68,7 +68,9 @@ enum {
41 #define MTK_FOE_IB2_DSCP GENMASK(31, 24)
42
43 /* CONFIG_MEDIATEK_NETSYS_V2 */
44 +#define MTK_FOE_IB2_QID_V2 GENMASK(6, 0)
45 #define MTK_FOE_IB2_PORT_MG_V2 BIT(7)
46 +#define MTK_FOE_IB2_PSE_QOS_V2 BIT(8)
47 #define MTK_FOE_IB2_DEST_PORT_V2 GENMASK(12, 9)
48 #define MTK_FOE_IB2_MULTICAST_V2 BIT(13)
49 #define MTK_FOE_IB2_WDMA_WINFO_V2 BIT(19)
50 @@ -351,6 +353,8 @@ int mtk_foe_entry_set_pppoe(struct mtk_e
51 int sid);
52 int mtk_foe_entry_set_wdma(struct mtk_eth *eth, struct mtk_foe_entry *entry,
53 int wdma_idx, int txq, int bss, int wcid);
54 +int mtk_foe_entry_set_queue(struct mtk_eth *eth, struct mtk_foe_entry *entry,
55 + unsigned int queue);
56 int mtk_foe_entry_commit(struct mtk_ppe *ppe, struct mtk_flow_entry *entry);
57 void mtk_foe_entry_clear(struct mtk_ppe *ppe, struct mtk_flow_entry *entry);
58 int mtk_foe_entry_idle_time(struct mtk_ppe *ppe, struct mtk_flow_entry *entry);
59 --- a/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
60 +++ b/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
61 @@ -188,7 +188,7 @@ mtk_flow_set_output_device(struct mtk_et
62 int *wed_index)
63 {
64 struct mtk_wdma_info info = {};
65 - int pse_port, dsa_port;
66 + int pse_port, dsa_port, queue;
67
68 if (mtk_flow_get_wdma_info(dev, dest_mac, &info) == 0) {
69 mtk_foe_entry_set_wdma(eth, foe, info.wdma_idx, info.queue,
70 @@ -212,8 +212,6 @@ mtk_flow_set_output_device(struct mtk_et
71 }
72
73 dsa_port = mtk_flow_get_dsa_port(&dev);
74 - if (dsa_port >= 0)
75 - mtk_foe_entry_set_dsa(eth, foe, dsa_port);
76
77 if (dev == eth->netdev[0])
78 pse_port = 1;
79 @@ -222,6 +220,14 @@ mtk_flow_set_output_device(struct mtk_et
80 else
81 return -EOPNOTSUPP;
82
83 + if (dsa_port >= 0) {
84 + mtk_foe_entry_set_dsa(eth, foe, dsa_port);
85 + queue = 3 + dsa_port;
86 + } else {
87 + queue = pse_port - 1;
88 + }
89 + mtk_foe_entry_set_queue(eth, foe, queue);
90 +
91 out:
92 mtk_foe_entry_set_pse_port(eth, foe, pse_port);
93