git.openwrt.org Git - openwrt/staging/neocturne.git/blob

   1 From 6c3b88970175e18a67eb8e55c4eba10614d0d5dc Mon Sep 17 00:00:00 2001
   2 From: Michel Stempin <michel.stempin@wanadoo.fr>
   3 Date: Mon, 15 Jul 2013 12:13:56 +0200
   4 Subject: [PATCH] mtd: chips: Add support for PMC SPI Flash chips in m25p80.c
   5
   6 commit 6c3b88970175e18a67eb8e55c4eba10614d0d5dc upstream.
   7
   8 Add support for PMC (now Chingis, part of ISSI) Pm25LV512 (512 Kib),
   9 Pm25LV010 (1 Mib) and Pm25LQ032 (32 Mib) SPI Flash chips.
  10
  11 This patch addresses two generations of PMC SPI Flash chips:
  12
  13  - Pm25LV512 and Pm25LV010: these have 4KiB sectors and 32KiB
  14    blocks. The 4KiB sector erase uses a non-standard opcode
  15    (0xd7). They do not support JEDEC RDID (0x9f), and so they can only
  16    be detected by matching their name string with pre-configured
  17    platform data. Because of the cascaded acquisitions, the datasheet
  18    is no longer available on the current manufacturer's website,
  19    although it is still commonly used in some recent wireless routers
  20    (<https://forum.openwrt.org/viewtopic.php?pid=186360#p186360>). The
  21    only public datasheet available seems to be on GeoCities:
  22    <http://www.geocities.jp/scottle556/pdf/Pm25LV512-010.pdf>
  23
  24  - Pm25LQ032: a newer generation flash, with 4KiB sectors and 64KiB
  25    blocks. It uses the standard erase and JEDEC read-ID
  26    opcodes. Manufacturer's datasheet is here:
  27    <http://www.chingistek.com/img/Product_Files/Pm25LQ032C%20datasheet%20v1.6.1.pdf>
  28
  29 This patch is resent in order to take into account both Brian Norris
  30 remarks and this upstream patch:
  31
  32 commit e534ee4f9ca29fdb38eea4b0c53f2154fbd8c1ee
  33 Author: Krzysztof Mazur <krzysiek@podlesie.net>
  34 Date:   Fri Feb 22 15:51:05 2013 +0100
  35
  36     mtd: m25p80: introduce SST_WRITE flag for SST byte programming
  37
  38     Not all SST devices implement the SST byte programming command.
  39     Some devices (like SST25VF064C) implement only standard m25p80 page
  40     write command.
  41
  42     Now SPI flash devices that need sst_write() are explicitly marked
  43     with new SST_WRITE flag and the decision to use sst_write() is based
  44     on this flag instead of manufacturer id.
  45
  46 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
  47 Signed-off-by: Michel Stempin <michel.stempin@wanadoo.fr>
  48 [Brian: fixed conflict]
  49 Signed-off-by: Brian Norris <computersforpeace@gmail.com>
  50 Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
  51 ---
  52  drivers/mtd/devices/m25p80.c |   10 ++++++++++
  53  1 file changed, 10 insertions(+)
  54
  55 --- a/drivers/mtd/devices/m25p80.c
  56 +++ b/drivers/mtd/devices/m25p80.c
  57 @@ -43,6 +43,7 @@
  58  #define        OPCODE_FAST_READ        0x0b    /* Read data bytes (high frequency) */
  59  #define        OPCODE_PP               0x02    /* Page program (up to 256 bytes) */
  60  #define        OPCODE_BE_4K            0x20    /* Erase 4KiB block */
  61 +#define        OPCODE_BE_4K_PMC        0xd7    /* Erase 4KiB block on PMC chips */
  62  #define        OPCODE_BE_32K           0x52    /* Erase 32KiB block */
  63  #define        OPCODE_CHIP_ERASE       0xc7    /* Erase whole flash chip */
  64  #define        OPCODE_SE               0xd8    /* Sector erase (usually 64KiB) */
  65 @@ -682,6 +683,7 @@ struct flash_info {
  66  #define        SECT_4K         0x01            /* OPCODE_BE_4K works uniformly */
  67  #define        M25P_NO_ERASE   0x02            /* No erase command needed */
  68  #define        SST_WRITE       0x04            /* use SST byte programming */
  69 +#define        SECT_4K_PMC     0x10            /* OPCODE_BE_4K_PMC works uniformly */
  70  };
  71
  72  #define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags)     \
  73 @@ -762,6 +764,11 @@ static const struct spi_device_id m25p_i
  74         { "n25q128a13",  INFO(0x20ba18, 0, 64 * 1024, 256, 0) },
  75         { "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512, SECT_4K) },
  76
  77 +       /* PMC */
  78 +       { "pm25lv512", INFO(0, 0, 32 * 1024, 2, SECT_4K_PMC) },
  79 +       { "pm25lv010", INFO(0, 0, 32 * 1024, 4, SECT_4K_PMC) },
  80 +       { "pm25lq032", INFO(0x7f9d46, 0, 64 * 1024,  64, SECT_4K) },
  81 +
  82         /* Spansion -- single (large) sector size only, at least
  83          * for the chips listed here (without boot sectors).
  84          */
  85 @@ -1014,6 +1021,9 @@ static int m25p_probe(struct spi_device
  86         if (info->flags & SECT_4K) {
  87                 flash->erase_opcode = OPCODE_BE_4K;
  88                 flash->mtd.erasesize = 4096;
  89 +       } else if (info->flags & SECT_4K_PMC) {
  90 +               flash->erase_opcode = OPCODE_BE_4K_PMC;
  91 +               flash->mtd.erasesize = 4096;
  92         } else {
  93                 flash->erase_opcode = OPCODE_SE;
  94                 flash->mtd.erasesize = info->sector_size;