git.openwrt.org Git - openwrt/staging/mans0n.git/blob

   1 From f56324baf329bc9362a52ad77a4a1a0f3356d1bc Mon Sep 17 00:00:00 2001
   2 From: Franky Lin <franky.lin@broadcom.com>
   3 Date: Thu, 26 Apr 2018 12:16:51 +0200
   4 Subject: [PATCH] brcmfmac: coarse support for PCIe shared structure rev7
   5
   6 Revision 7 of PCIe dongle interface increases the item size of tx and rx
   7 complete rings to accommodate extra payload for new feature. This patch
   8 simply bump up the size of these two rings without adding the support
   9 for utilizing the new space. This makes brcmfmac compatible with rev7
  10 firmware.
  11
  12 Reviewed-by: Arend van Spriel <arend.vanspriel@broadcom.com>
  13 Signed-off-by: Franky Lin <franky.lin@broadcom.com>
  14 Signed-off-by: Arend van Spriel <arend.vanspriel@broadcom.com>
  15 Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
  16 ---
  17  .../wireless/broadcom/brcm80211/brcmfmac/msgbuf.h  |  6 ++++--
  18  .../wireless/broadcom/brcm80211/brcmfmac/pcie.c    | 23 ++++++++++++++++++----
  19  2 files changed, 23 insertions(+), 6 deletions(-)
  20
  21 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/msgbuf.h
  22 +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/msgbuf.h
  23 @@ -27,8 +27,10 @@
  24  #define BRCMF_H2D_MSGRING_CONTROL_SUBMIT_ITEMSIZE      40
  25  #define BRCMF_H2D_MSGRING_RXPOST_SUBMIT_ITEMSIZE       32
  26  #define BRCMF_D2H_MSGRING_CONTROL_COMPLETE_ITEMSIZE    24
  27 -#define BRCMF_D2H_MSGRING_TX_COMPLETE_ITEMSIZE         16
  28 -#define BRCMF_D2H_MSGRING_RX_COMPLETE_ITEMSIZE         32
  29 +#define BRCMF_D2H_MSGRING_TX_COMPLETE_ITEMSIZE_PRE_V7  16
  30 +#define BRCMF_D2H_MSGRING_TX_COMPLETE_ITEMSIZE         24
  31 +#define BRCMF_D2H_MSGRING_RX_COMPLETE_ITEMSIZE_PRE_V7  32
  32 +#define BRCMF_D2H_MSGRING_RX_COMPLETE_ITEMSIZE         40
  33  #define BRCMF_H2D_TXFLOWRING_ITEMSIZE                  48
  34
  35  struct msgbuf_buf_addr {
  36 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c
  37 +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c
  38 @@ -136,8 +136,9 @@ static const struct brcmf_firmware_mappi
  39                                                  BRCMF_PCIE_MB_INT_D2H3_DB0 | \
  40                                                  BRCMF_PCIE_MB_INT_D2H3_DB1)
  41
  42 +#define BRCMF_PCIE_SHARED_VERSION_7            7
  43  #define BRCMF_PCIE_MIN_SHARED_VERSION          5
  44 -#define BRCMF_PCIE_MAX_SHARED_VERSION          6
  45 +#define BRCMF_PCIE_MAX_SHARED_VERSION          BRCMF_PCIE_SHARED_VERSION_7
  46  #define BRCMF_PCIE_SHARED_VERSION_MASK         0x00FF
  47  #define BRCMF_PCIE_SHARED_DMA_INDEX            0x10000
  48  #define BRCMF_PCIE_SHARED_DMA_2B_IDX           0x100000
  49 @@ -318,6 +319,14 @@ static const u32 brcmf_ring_max_item[BRC
  50         BRCMF_D2H_MSGRING_RX_COMPLETE_MAX_ITEM
  51  };
  52
  53 +static const u32 brcmf_ring_itemsize_pre_v7[BRCMF_NROF_COMMON_MSGRINGS] = {
  54 +       BRCMF_H2D_MSGRING_CONTROL_SUBMIT_ITEMSIZE,
  55 +       BRCMF_H2D_MSGRING_RXPOST_SUBMIT_ITEMSIZE,
  56 +       BRCMF_D2H_MSGRING_CONTROL_COMPLETE_ITEMSIZE,
  57 +       BRCMF_D2H_MSGRING_TX_COMPLETE_ITEMSIZE_PRE_V7,
  58 +       BRCMF_D2H_MSGRING_RX_COMPLETE_ITEMSIZE_PRE_V7
  59 +};
  60 +
  61  static const u32 brcmf_ring_itemsize[BRCMF_NROF_COMMON_MSGRINGS] = {
  62         BRCMF_H2D_MSGRING_CONTROL_SUBMIT_ITEMSIZE,
  63         BRCMF_H2D_MSGRING_RXPOST_SUBMIT_ITEMSIZE,
  64 @@ -1007,8 +1016,14 @@ brcmf_pcie_alloc_dma_and_ring(struct brc
  65         struct brcmf_pcie_ringbuf *ring;
  66         u32 size;
  67         u32 addr;
  68 +       const u32 *ring_itemsize_array;
  69 +
  70 +       if (devinfo->shared.version < BRCMF_PCIE_SHARED_VERSION_7)
  71 +               ring_itemsize_array = brcmf_ring_itemsize_pre_v7;
  72 +       else
  73 +               ring_itemsize_array = brcmf_ring_itemsize;
  74
  75 -       size = brcmf_ring_max_item[ring_id] * brcmf_ring_itemsize[ring_id];
  76 +       size = brcmf_ring_max_item[ring_id] * ring_itemsize_array[ring_id];
  77         dma_buf = brcmf_pcie_init_dmabuffer_for_device(devinfo, size,
  78                         tcm_ring_phys_addr + BRCMF_RING_MEM_BASE_ADDR_OFFSET,
  79                         &dma_handle);
  80 @@ -1018,7 +1033,7 @@ brcmf_pcie_alloc_dma_and_ring(struct brc
  81         addr = tcm_ring_phys_addr + BRCMF_RING_MAX_ITEM_OFFSET;
  82         brcmf_pcie_write_tcm16(devinfo, addr, brcmf_ring_max_item[ring_id]);
  83         addr = tcm_ring_phys_addr + BRCMF_RING_LEN_ITEMS_OFFSET;
  84 -       brcmf_pcie_write_tcm16(devinfo, addr, brcmf_ring_itemsize[ring_id]);
  85 +       brcmf_pcie_write_tcm16(devinfo, addr, ring_itemsize_array[ring_id]);
  86
  87         ring = kzalloc(sizeof(*ring), GFP_KERNEL);
  88         if (!ring) {
  89 @@ -1027,7 +1042,7 @@ brcmf_pcie_alloc_dma_and_ring(struct brc
  90                 return NULL;
  91         }
  92         brcmf_commonring_config(&ring->commonring, brcmf_ring_max_item[ring_id],
  93 -                               brcmf_ring_itemsize[ring_id], dma_buf);
  94 +                               ring_itemsize_array[ring_id], dma_buf);
  95         ring->dma_handle = dma_handle;
  96         ring->devinfo = devinfo;
  97         brcmf_commonring_register_cb(&ring->commonring,