git.openwrt.org Git - openwrt/staging/ldir.git/blob

   1 From fb9da17bd26552f48cda4f2f658379e7f5860691 Mon Sep 17 00:00:00 2001
   2 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
   3 Date: Wed, 24 Mar 2021 09:19:04 +0100
   4 Subject: [PATCH 03/22] dt-bindings: improve BCM6345 GPIO binding documentation
   5 MIME-Version: 1.0
   6 Content-Type: text/plain; charset=UTF-8
   7 Content-Transfer-Encoding: 8bit
   8
   9 Convert existing BCM6345 GPIO binding documentation to YAML and add binding
  10 documentation for the GPIO controller found in BCM6318, BCM6328, BCM6358,
  11 BCM6362, BCM6368 and BCM63268 SoCs.
  12
  13 Co-developed-by: Jonas Gorski <jonas.gorski@gmail.com>
  14 Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
  15 Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
  16 Reviewed-by: Rob Herring <robh@kernel.org>
  17 Link: https://lore.kernel.org/r/20210324081923.20379-4-noltari@gmail.com
  18 Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
  19 ---
  20  .../bindings/gpio/brcm,bcm6345-gpio.txt       | 46 ----------
  21  .../bindings/gpio/brcm,bcm6345-gpio.yaml      | 86 +++++++++++++++++++
  22  2 files changed, 86 insertions(+), 46 deletions(-)
  23  delete mode 100644 Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.txt
  24  create mode 100644 Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.yaml
  25
  26 --- a/Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.txt
  27 +++ /dev/null
  28 @@ -1,46 +0,0 @@
  29 -Bindings for the Broadcom's brcm,bcm6345-gpio memory-mapped GPIO controllers.
  30 -
  31 -These bindings can be used on any BCM63xx SoC. However, BCM6338 and BCM6345
  32 -are the only ones which don't need a pinctrl driver.
  33 -BCM6338 have 8-bit data and dirout registers, where GPIO state can be read
  34 -and/or written, and the direction changed from input to output.
  35 -BCM6345 have 16-bit data and dirout registers, where GPIO state can be read
  36 -and/or written, and the direction changed from input to output.
  37 -
  38 -Required properties:
  39 -       - compatible: should be "brcm,bcm6345-gpio"
  40 -       - reg-names: must contain
  41 -               "dat" - data register
  42 -               "dirout" - direction (output) register
  43 -       - reg: address + size pairs describing the GPIO register sets;
  44 -               order must correspond with the order of entries in reg-names
  45 -       - #gpio-cells: must be set to 2. The first cell is the pin number and
  46 -                       the second cell is used to specify the gpio polarity:
  47 -                       0 = active high
  48 -                       1 = active low
  49 -       - gpio-controller: Marks the device node as a gpio controller.
  50 -
  51 -Optional properties:
  52 -       - native-endian: use native endian memory.
  53 -
  54 -Examples:
  55 -       - BCM6338:
  56 -       gpio: gpio-controller@fffe0407 {
  57 -               compatible = "brcm,bcm6345-gpio";
  58 -               reg-names = "dirout", "dat";
  59 -               reg = <0xfffe0407 1>, <0xfffe040f 1>;
  60 -
  61 -               #gpio-cells = <2>;
  62 -               gpio-controller;
  63 -       };
  64 -
  65 -       - BCM6345:
  66 -       gpio: gpio-controller@fffe0406 {
  67 -               compatible = "brcm,bcm6345-gpio";
  68 -               reg-names = "dirout", "dat";
  69 -               reg = <0xfffe0406 2>, <0xfffe040a 2>;
  70 -               native-endian;
  71 -
  72 -               #gpio-cells = <2>;
  73 -               gpio-controller;
  74 -       };
  75 --- /dev/null
  76 +++ b/Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.yaml
  77 @@ -0,0 +1,86 @@
  78 +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
  79 +%YAML 1.2
  80 +---
  81 +$id: http://devicetree.org/schemas/gpio/brcm,bcm6345-gpio.yaml#
  82 +$schema: http://devicetree.org/meta-schemas/core.yaml#
  83 +
  84 +title: Broadcom BCM6345 GPIO controller
  85 +
  86 +maintainers:
  87 +  - Álvaro Fernández Rojas <noltari@gmail.com>
  88 +  - Jonas Gorski <jonas.gorski@gmail.com>
  89 +
  90 +description: |+
  91 +  Bindings for Broadcom's BCM63xx memory-mapped GPIO controllers.
  92 +
  93 +  These bindings can be used on any BCM63xx SoC. However, BCM6338 and BCM6345
  94 +  are the only ones which don't need a pinctrl driver.
  95 +
  96 +  BCM6338 have 8-bit data and dirout registers, where GPIO state can be read
  97 +  and/or written, and the direction changed from input to output.
  98 +  BCM6345 have 16-bit data and dirout registers, where GPIO state can be read
  99 +  and/or written, and the direction changed from input to output.
 100 +  BCM6318, BCM6328, BCM6358, BCM6362, BCM6368 and BCM63268 have 32-bit data
 101 +  and dirout registers, where GPIO state can be read and/or written, and the
 102 +  direction changed from input to output.
 103 +
 104 +properties:
 105 +  compatible:
 106 +    enum:
 107 +      - brcm,bcm6318-gpio
 108 +      - brcm,bcm6328-gpio
 109 +      - brcm,bcm6345-gpio
 110 +      - brcm,bcm6358-gpio
 111 +      - brcm,bcm6362-gpio
 112 +      - brcm,bcm6368-gpio
 113 +      - brcm,bcm63268-gpio
 114 +
 115 +  gpio-controller: true
 116 +
 117 +  "#gpio-cells":
 118 +    const: 2
 119 +
 120 +  gpio-ranges:
 121 +    maxItems: 1
 122 +
 123 +  native-endian: true
 124 +
 125 +  reg:
 126 +    maxItems: 2
 127 +
 128 +  reg-names:
 129 +    items:
 130 +      - const: dirout
 131 +      - const: dat
 132 +
 133 +required:
 134 +  - compatible
 135 +  - reg
 136 +  - reg-names
 137 +  - gpio-controller
 138 +  - '#gpio-cells'
 139 +
 140 +additionalProperties: false
 141 +
 142 +examples:
 143 +  - |
 144 +    gpio@fffe0406 {
 145 +      compatible = "brcm,bcm6345-gpio";
 146 +      reg-names = "dirout", "dat";
 147 +      reg = <0xfffe0406 2>, <0xfffe040a 2>;
 148 +      native-endian;
 149 +
 150 +      gpio-controller;
 151 +      #gpio-cells = <2>;
 152 +    };
 153 +
 154 +  - |
 155 +    gpio@0 {
 156 +      compatible = "brcm,bcm63268-gpio";
 157 +      reg-names = "dirout", "dat";
 158 +      reg = <0x0 0x8>, <0x8 0x8>;
 159 +
 160 +      gpio-controller;
 161 +      gpio-ranges = <&pinctrl 0 0 52>;
 162 +      #gpio-cells = <2>;
 163 +    };