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1 From d949248dccef18f7257d8de0adfd67244955e7b7 Mon Sep 17 00:00:00 2001
2 From: Pankaj Bansal <pankaj.bansal@nxp.com>
3 Date: Mon, 22 Apr 2019 16:22:49 +0530
4 Subject: [PATCH] arm64: dts: fsl: layerscape: fix warnings when compiling dts
5 files
6
7 when compiling dts file using DTC_FLAG='-@', the device tree compiler
8 reports these warnings:
9
10 Warning (simple_bus_reg): /soc/mdio@0x8c0b000: simple-bus unit address
11 format error, expected "8c0b000"
12 Warning (unit_address_format): /pfe@04000000: unit name should not have
13 leading 0s
14
15 Fixed the node names to silence these warnings.
16
17 Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
18 ---
19 arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 3 ++-
20 arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 14 +++++++-------
21 arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 22 +++++++++++-----------
22 arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 18 +++++++++---------
23 4 files changed, 29 insertions(+), 28 deletions(-)
24
25 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
26 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
27 @@ -3,6 +3,7 @@
28 * Device Tree Include file for Freescale Layerscape-1012A family SoC.
29 *
30 * Copyright 2016 Freescale Semiconductor, Inc.
31 + * Copyright 2019 NXP
32 *
33 */
34
35 @@ -514,7 +515,7 @@
36 };
37 };
38
39 - pfe: pfe@04000000 {
40 + pfe: pfe@4000000 {
41 compatible = "fsl,pfe";
42 reg = <0x0 0x04000000 0x0 0xc00000>, /* AXI 16M */
43 <0x0 0x83400000 0x0 0xc00000>; /* PFE DDR 12M */
44 --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
45 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
46 @@ -2,7 +2,7 @@
47 /*
48 * Device Tree Include file for NXP Layerscape-1088A family SoC.
49 *
50 - * Copyright 2017 NXP
51 + * Copyright 2017-2019 NXP
52 *
53 * Harninder Rai <harninder.rai@nxp.com>
54 *
55 @@ -310,7 +310,7 @@
56 };
57
58 /* TODO: WRIOP (CCSR?) */
59 - emdio1: mdio@0x8B96000 { /* WRIOP0: 0x8B8_0000,
60 + emdio1: mdio@8B96000 { /* WRIOP0: 0x8B8_0000,
61 * E-MDIO1: 0x1_6000
62 */
63 compatible = "fsl,fman-memac-mdio";
64 @@ -323,7 +323,7 @@
65 #size-cells = <0>;
66 };
67
68 - emdio2: mdio@0x8B97000 { /* WRIOP0: 0x8B8_0000,
69 + emdio2: mdio@8B97000 { /* WRIOP0: 0x8B8_0000,
70 * E-MDIO2: 0x1_7000
71 */
72 compatible = "fsl,fman-memac-mdio";
73 @@ -335,7 +335,7 @@
74 #size-cells = <0>;
75 };
76
77 - pcs_mdio1: mdio@0x8c07000 {
78 + pcs_mdio1: mdio@8c07000 {
79 compatible = "fsl,fman-memac-mdio";
80 reg = <0x0 0x8c07000 0x0 0x1000>;
81 device_type = "mdio";
82 @@ -345,7 +345,7 @@
83 #size-cells = <0>;
84 };
85
86 - pcs_mdio2: mdio@0x8c0b000 {
87 + pcs_mdio2: mdio@8c0b000 {
88 compatible = "fsl,fman-memac-mdio";
89 reg = <0x0 0x8c0b000 0x0 0x1000>;
90 device_type = "mdio";
91 @@ -355,7 +355,7 @@
92 #size-cells = <0>;
93 };
94
95 - pcs_mdio3: mdio@0x8c0f000 {
96 + pcs_mdio3: mdio@8c0f000 {
97 compatible = "fsl,fman-memac-mdio";
98 reg = <0x0 0x8c0f000 0x0 0x1000>;
99 device_type = "mdio";
100 @@ -365,7 +365,7 @@
101 #size-cells = <0>;
102 };
103
104 - pcs_mdio4: mdio@0x8c13000 {
105 + pcs_mdio4: mdio@8c13000 {
106 compatible = "fsl,fman-memac-mdio";
107 reg = <0x0 0x8c13000 0x0 0x1000>;
108 device_type = "mdio";
109 --- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
110 +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
111 @@ -3,7 +3,7 @@
112 * Device Tree Include file for Freescale Layerscape-2080A family SoC.
113 *
114 * Copyright 2016 Freescale Semiconductor, Inc.
115 - * Copyright 2017 NXP
116 + * Copyright 2017-2019 NXP
117 *
118 * Abhimanyu Saini <abhimanyu.saini@nxp.com>
119 *
120 @@ -524,7 +524,7 @@
121 };
122
123 /* TODO: WRIOP (CCSR?) */
124 - emdio1: mdio@0x8B96000 { /* WRIOP0: 0x8B8_0000,
125 + emdio1: mdio@8B96000 { /* WRIOP0: 0x8B8_0000,
126 * E-MDIO1: 0x1_6000
127 */
128 compatible = "fsl,fman-memac-mdio";
129 @@ -537,7 +537,7 @@
130 #size-cells = <0>;
131 };
132
133 - emdio2: mdio@0x8B97000 { /* WRIOP0: 0x8B8_0000,
134 + emdio2: mdio@8B97000 { /* WRIOP0: 0x8B8_0000,
135 * E-MDIO2: 0x1_7000
136 */
137 compatible = "fsl,fman-memac-mdio";
138 @@ -549,7 +549,7 @@
139 #size-cells = <0>;
140 };
141
142 - pcs_mdio1: mdio@0x8c07000 {
143 + pcs_mdio1: mdio@8c07000 {
144 compatible = "fsl,fman-memac-mdio";
145 reg = <0x0 0x8c07000 0x0 0x1000>;
146 device_type = "mdio";
147 @@ -559,7 +559,7 @@
148 #size-cells = <0>;
149 };
150
151 - pcs_mdio2: mdio@0x8c0b000 {
152 + pcs_mdio2: mdio@8c0b000 {
153 compatible = "fsl,fman-memac-mdio";
154 reg = <0x0 0x8c0b000 0x0 0x1000>;
155 device_type = "mdio";
156 @@ -569,7 +569,7 @@
157 #size-cells = <0>;
158 };
159
160 - pcs_mdio3: mdio@0x8c0f000 {
161 + pcs_mdio3: mdio@8c0f000 {
162 compatible = "fsl,fman-memac-mdio";
163 reg = <0x0 0x8c0f000 0x0 0x1000>;
164 device_type = "mdio";
165 @@ -579,7 +579,7 @@
166 #size-cells = <0>;
167 };
168
169 - pcs_mdio4: mdio@0x8c13000 {
170 + pcs_mdio4: mdio@8c13000 {
171 compatible = "fsl,fman-memac-mdio";
172 reg = <0x0 0x8c13000 0x0 0x1000>;
173 device_type = "mdio";
174 @@ -589,7 +589,7 @@
175 #size-cells = <0>;
176 };
177
178 - pcs_mdio5: mdio@0x8c17000 {
179 + pcs_mdio5: mdio@8c17000 {
180 status = "disabled";
181 compatible = "fsl,fman-memac-mdio";
182 reg = <0x0 0x8c17000 0x0 0x1000>;
183 @@ -600,7 +600,7 @@
184 #size-cells = <0>;
185 };
186
187 - pcs_mdio6: mdio@0x8c1b000 {
188 + pcs_mdio6: mdio@8c1b000 {
189 status = "disabled";
190 compatible = "fsl,fman-memac-mdio";
191 reg = <0x0 0x8c1b000 0x0 0x1000>;
192 @@ -611,7 +611,7 @@
193 #size-cells = <0>;
194 };
195
196 - pcs_mdio7: mdio@0x8c1f000 {
197 + pcs_mdio7: mdio@8c1f000 {
198 status = "disabled";
199 compatible = "fsl,fman-memac-mdio";
200 reg = <0x0 0x8c1f000 0x0 0x1000>;
201 @@ -622,7 +622,7 @@
202 #size-cells = <0>;
203 };
204
205 - pcs_mdio8: mdio@0x8c23000 {
206 + pcs_mdio8: mdio@8c23000 {
207 status = "disabled";
208 compatible = "fsl,fman-memac-mdio";
209 reg = <0x0 0x8c23000 0x0 0x1000>;
210 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
211 +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
212 @@ -2,7 +2,7 @@
213 //
214 // Device Tree Include file for Layerscape-LX2160A family SoC.
215 //
216 -// Copyright 2018 NXP
217 +// Copyright 2018-2019 NXP
218
219 #include <dt-bindings/gpio/gpio.h>
220 #include <dt-bindings/interrupt-controller/arm-gic.h>
221 @@ -500,7 +500,7 @@
222 status = "disabled";
223 };
224
225 - pcs_mdio1: mdio@0x8c07000 {
226 + pcs_mdio1: mdio@8c07000 {
227 compatible = "fsl,fman-memac-mdio";
228 reg = <0x0 0x8c07000 0x0 0x1000>;
229 device_type = "mdio";
230 @@ -510,7 +510,7 @@
231 #size-cells = <0>;
232 };
233
234 - pcs_mdio2: mdio@0x8c0b000 {
235 + pcs_mdio2: mdio@8c0b000 {
236 compatible = "fsl,fman-memac-mdio";
237 reg = <0x0 0x8c0b000 0x0 0x1000>;
238 device_type = "mdio";
239 @@ -520,7 +520,7 @@
240 #size-cells = <0>;
241 };
242
243 - pcs_mdio3: mdio@0x8c0f000 {
244 + pcs_mdio3: mdio@8c0f000 {
245 compatible = "fsl,fman-memac-mdio";
246 reg = <0x0 0x8c0f000 0x0 0x1000>;
247 device_type = "mdio";
248 @@ -530,7 +530,7 @@
249 #size-cells = <0>;
250 };
251
252 - pcs_mdio4: mdio@0x8c13000 {
253 + pcs_mdio4: mdio@8c13000 {
254 compatible = "fsl,fman-memac-mdio";
255 reg = <0x0 0x8c13000 0x0 0x1000>;
256 device_type = "mdio";
257 @@ -540,7 +540,7 @@
258 #size-cells = <0>;
259 };
260
261 - pcs_mdio5: mdio@0x8c17000 {
262 + pcs_mdio5: mdio@8c17000 {
263 compatible = "fsl,fman-memac-mdio";
264 reg = <0x0 0x8c17000 0x0 0x1000>;
265 device_type = "mdio";
266 @@ -550,7 +550,7 @@
267 #size-cells = <0>;
268 };
269
270 - pcs_mdio6: mdio@0x8c1b000 {
271 + pcs_mdio6: mdio@8c1b000 {
272 compatible = "fsl,fman-memac-mdio";
273 reg = <0x0 0x8c1b000 0x0 0x1000>;
274 device_type = "mdio";
275 @@ -560,7 +560,7 @@
276 #size-cells = <0>;
277 };
278
279 - pcs_mdio7: mdio@0x8c1f000 {
280 + pcs_mdio7: mdio@8c1f000 {
281 compatible = "fsl,fman-memac-mdio";
282 reg = <0x0 0x8c1f000 0x0 0x1000>;
283 device_type = "mdio";
284 @@ -570,7 +570,7 @@
285 #size-cells = <0>;
286 };
287
288 - pcs_mdio8: mdio@0x8c23000 {
289 + pcs_mdio8: mdio@8c23000 {
290 compatible = "fsl,fman-memac-mdio";
291 reg = <0x0 0x8c23000 0x0 0x1000>;
292 device_type = "mdio";
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