projects / openwrt / staging / mkresin.git / blob
? search:


7aa3de929f2e9e52c22e7abeec25d1f3644667db
[openwrt/staging/mkresin.git] /
1 From 71bd508d7ded8c504ef05d1b4befecfe25e54cb1 Mon Sep 17 00:00:00 2001
2 From: Ian Molton <ian@mnementh.co.uk>
3 Date: Fri, 8 Dec 2017 13:10:29 +0100
4 Subject: [PATCH] brcmfmac: Rename / replace old IO functions with simpler
5 ones.
6
7 Primarily this patch removes:
8
9 brcmf_sdiod_f0_writeb()
10 brcmf_sdiod_reg_write()
11 brcmf_sdiod_reg_read()
12
13 Since we no longer use the quirky method of deciding which function to
14 address via the address being accessed, take the opportunity to rename
15 some IO functions more in line with common kernel code. We also convert
16 those that map directly to sdio_{read,write}*() to macros.
17
18 Signed-off-by: Ian Molton <ian@mnementh.co.uk>
19 Reviewed-by: Arend van Spriel <arend.vanspriel@broadcom.com>
20 Signed-off-by: Arend van Spriel <arend.vanspriel@broadcom.com>
21 Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
22 ---
23 .../wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c | 169 +++----------------
24 .../wireless/broadcom/brcm80211/brcmfmac/sdio.c | 186 ++++++++++-----------
25 .../wireless/broadcom/brcm80211/brcmfmac/sdio.h | 28 +++-
26 3 files changed, 138 insertions(+), 245 deletions(-)
27
28 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c
29 +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c
30 @@ -137,27 +137,27 @@ int brcmf_sdiod_intr_register(struct brc
31 if (sdiodev->bus_if->chip == BRCM_CC_43362_CHIP_ID) {
32 /* assign GPIO to SDIO core */
33 addr = CORE_CC_REG(SI_ENUM_BASE, gpiocontrol);
34 - gpiocontrol = brcmf_sdiod_regrl(sdiodev, addr, &ret);
35 + gpiocontrol = brcmf_sdiod_readl(sdiodev, addr, &ret);
36 gpiocontrol |= 0x2;
37 - brcmf_sdiod_regwl(sdiodev, addr, gpiocontrol, &ret);
38 + brcmf_sdiod_writel(sdiodev, addr, gpiocontrol, &ret);
39
40 - brcmf_sdiod_regwb(sdiodev, SBSDIO_GPIO_SELECT, 0xf,
41 - &ret);
42 - brcmf_sdiod_regwb(sdiodev, SBSDIO_GPIO_OUT, 0, &ret);
43 - brcmf_sdiod_regwb(sdiodev, SBSDIO_GPIO_EN, 0x2, &ret);
44 + brcmf_sdiod_writeb(sdiodev, SBSDIO_GPIO_SELECT,
45 + 0xf, &ret);
46 + brcmf_sdiod_writeb(sdiodev, SBSDIO_GPIO_OUT, 0, &ret);
47 + brcmf_sdiod_writeb(sdiodev, SBSDIO_GPIO_EN, 0x2, &ret);
48 }
49
50 /* must configure SDIO_CCCR_IENx to enable irq */
51 - data = brcmf_sdiod_regrb(sdiodev, SDIO_CCCR_IENx, &ret);
52 + data = brcmf_sdiod_func0_rb(sdiodev, SDIO_CCCR_IENx, &ret);
53 data |= 1 << SDIO_FUNC_1 | 1 << SDIO_FUNC_2 | 1;
54 - brcmf_sdiod_regwb(sdiodev, SDIO_CCCR_IENx, data, &ret);
55 + brcmf_sdiod_func0_wb(sdiodev, SDIO_CCCR_IENx, data, &ret);
56
57 /* redirect, configure and enable io for interrupt signal */
58 data = SDIO_SEPINT_MASK | SDIO_SEPINT_OE;
59 if (pdata->oob_irq_flags & IRQF_TRIGGER_HIGH)
60 data |= SDIO_SEPINT_ACT_HI;
61 - brcmf_sdiod_regwb(sdiodev, SDIO_CCCR_BRCM_SEPINT, data, &ret);
62 -
63 + brcmf_sdiod_func0_wb(sdiodev, SDIO_CCCR_BRCM_SEPINT,
64 + data, &ret);
65 sdio_release_host(sdiodev->func[1]);
66 } else {
67 brcmf_dbg(SDIO, "Entering\n");
68 @@ -183,8 +183,8 @@ void brcmf_sdiod_intr_unregister(struct
69
70 pdata = &sdiodev->settings->bus.sdio;
71 sdio_claim_host(sdiodev->func[1]);
72 - brcmf_sdiod_regwb(sdiodev, SDIO_CCCR_BRCM_SEPINT, 0, NULL);
73 - brcmf_sdiod_regwb(sdiodev, SDIO_CCCR_IENx, 0, NULL);
74 + brcmf_sdiod_func0_wb(sdiodev, SDIO_CCCR_BRCM_SEPINT, 0, NULL);
75 + brcmf_sdiod_func0_wb(sdiodev, SDIO_CCCR_IENx, 0, NULL);
76 sdio_release_host(sdiodev->func[1]);
77
78 sdiodev->oob_irq_requested = false;
79 @@ -242,8 +242,8 @@ static int brcmf_sdiod_set_sbaddr_window
80 addr = (address & SBSDIO_SBWINDOW_MASK) >> 8;
81
82 for (i = 0 ; i < 3 && !err ; i++, addr >>= 8)
83 - brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_SBADDRLOW + i,
84 - addr & 0xff, &err);
85 + brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_SBADDRLOW + i,
86 + addr & 0xff, &err);
87
88 return err;
89 }
90 @@ -267,124 +267,15 @@ static int brcmf_sdiod_addrprep(struct b
91 return 0;
92 }
93
94 -static inline int brcmf_sdiod_f0_writeb(struct sdio_func *func, u8 byte,
95 - uint regaddr)
96 -{
97 - int err_ret;
98 -
99 - /*
100 - * Can only directly write to some F0 registers.
101 - * Handle CCCR_IENx and CCCR_ABORT command
102 - * as a special case.
103 - */
104 - if ((regaddr == SDIO_CCCR_ABORT) ||
105 - (regaddr == SDIO_CCCR_IENx))
106 - sdio_writeb(func, byte, regaddr, &err_ret);
107 - else
108 - sdio_f0_writeb(func, byte, regaddr, &err_ret);
109 -
110 - return err_ret;
111 -}
112 -
113 -static int brcmf_sdiod_reg_write(struct brcmf_sdio_dev *sdiodev, u32 addr,
114 - u8 regsz, void *data)
115 -{
116 - int ret;
117 -
118 - /*
119 - * figure out how to read the register based on address range
120 - * 0x00 ~ 0x7FF: function 0 CCCR and FBR
121 - * 0x10000 ~ 0x1FFFF: function 1 miscellaneous registers
122 - * The rest: function 1 silicon backplane core registers
123 - * f0 writes must be bytewise
124 - */
125 -
126 - if ((addr & ~REG_F0_REG_MASK) == 0) {
127 - if (WARN_ON(regsz > 1))
128 - return -EINVAL;
129 - ret = brcmf_sdiod_f0_writeb(sdiodev->func[0],
130 - *(u8 *)data, addr);
131 - } else {
132 - switch (regsz) {
133 - case 1:
134 - sdio_writeb(sdiodev->func[1], *(u8 *)data, addr, &ret);
135 - break;
136 - case 4:
137 - ret = brcmf_sdiod_addrprep(sdiodev, &addr);
138 - if (ret)
139 - goto done;
140 -
141 - sdio_writel(sdiodev->func[1], *(u32 *)data, addr, &ret);
142 - break;
143 - default:
144 - WARN(1, "Invalid reg size\n");
145 - ret = -EINVAL;
146 - break;
147 - }
148 - }
149 -
150 -done:
151 - return ret;
152 -}
153 -
154 -static int brcmf_sdiod_reg_read(struct brcmf_sdio_dev *sdiodev, u32 addr,
155 - u8 regsz, void *data)
156 -{
157 - int ret;
158 -
159 - /*
160 - * figure out how to read the register based on address range
161 - * 0x00 ~ 0x7FF: function 0 CCCR and FBR
162 - * 0x10000 ~ 0x1FFFF: function 1 miscellaneous registers
163 - * The rest: function 1 silicon backplane core registers
164 - * f0 reads must be bytewise
165 - */
166 - if ((addr & ~REG_F0_REG_MASK) == 0) {
167 - if (WARN_ON(regsz > 1))
168 - return -EINVAL;
169 - *(u8 *)data = sdio_f0_readb(sdiodev->func[0], addr, &ret);
170 - } else {
171 - switch (regsz) {
172 - case 1:
173 - *(u8 *)data = sdio_readb(sdiodev->func[1], addr, &ret);
174 - break;
175 - case 4:
176 - ret = brcmf_sdiod_addrprep(sdiodev, &addr);
177 - if (ret)
178 - goto done;
179 -
180 - *(u32 *)data = sdio_readl(sdiodev->func[1], addr, &ret);
181 - break;
182 - default:
183 - WARN(1, "Invalid reg size\n");
184 - ret = -EINVAL;
185 - break;
186 - }
187 - }
188 -
189 -done:
190 - return ret;
191 -}
192 -
193 -u8 brcmf_sdiod_regrb(struct brcmf_sdio_dev *sdiodev, u32 addr, int *ret)
194 +u32 brcmf_sdiod_readl(struct brcmf_sdio_dev *sdiodev, u32 addr, int *ret)
195 {
196 - u8 data;
197 + u32 data = 0;
198 int retval;
199
200 - retval = brcmf_sdiod_reg_read(sdiodev, addr, 1, &data);
201 + retval = brcmf_sdiod_addrprep(sdiodev, &addr);
202
203 - if (ret)
204 - *ret = retval;
205 -
206 - return data;
207 -}
208 -
209 -u32 brcmf_sdiod_regrl(struct brcmf_sdio_dev *sdiodev, u32 addr, int *ret)
210 -{
211 - u32 data;
212 - int retval;
213 -
214 - retval = brcmf_sdiod_reg_read(sdiodev, addr, 4, &data);
215 + if (!retval)
216 + data = sdio_readl(sdiodev->func[1], addr, &retval);
217
218 if (ret)
219 *ret = retval;
220 @@ -392,23 +283,15 @@ u32 brcmf_sdiod_regrl(struct brcmf_sdio_
221 return data;
222 }
223
224 -void brcmf_sdiod_regwb(struct brcmf_sdio_dev *sdiodev, u32 addr,
225 - u8 data, int *ret)
226 +void brcmf_sdiod_writel(struct brcmf_sdio_dev *sdiodev, u32 addr,
227 + u32 data, int *ret)
228 {
229 int retval;
230
231 - retval = brcmf_sdiod_reg_write(sdiodev, addr, 1, &data);
232 -
233 - if (ret)
234 - *ret = retval;
235 -}
236 -
237 -void brcmf_sdiod_regwl(struct brcmf_sdio_dev *sdiodev, u32 addr,
238 - u32 data, int *ret)
239 -{
240 - int retval;
241 + retval = brcmf_sdiod_addrprep(sdiodev, &addr);
242
243 - retval = brcmf_sdiod_reg_write(sdiodev, addr, 4, &data);
244 + if (!retval)
245 + sdio_writel(sdiodev->func[1], data, addr, &retval);
246
247 if (ret)
248 *ret = retval;
249 @@ -846,8 +729,8 @@ int brcmf_sdiod_abort(struct brcmf_sdio_
250 {
251 brcmf_dbg(SDIO, "Enter\n");
252
253 - /* issue abort cmd52 command through F0 */
254 - brcmf_sdiod_reg_write(sdiodev, SDIO_CCCR_ABORT, 1, &fn);
255 + /* Issue abort cmd52 command through F0 */
256 + brcmf_sdiod_func0_wb(sdiodev, SDIO_CCCR_ABORT, fn, NULL);
257
258 brcmf_dbg(SDIO, "Exit\n");
259 return 0;
260 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c
261 +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c
262 @@ -669,7 +669,7 @@ static int r_sdreg32(struct brcmf_sdio *
263 int ret;
264
265 core = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
266 - *regvar = brcmf_sdiod_regrl(bus->sdiodev, core->base + offset, &ret);
267 + *regvar = brcmf_sdiod_readl(bus->sdiodev, core->base + offset, &ret);
268
269 return ret;
270 }
271 @@ -680,7 +680,7 @@ static int w_sdreg32(struct brcmf_sdio *
272 int ret;
273
274 core = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
275 - brcmf_sdiod_regwl(bus->sdiodev, core->base + reg_offset, regval, &ret);
276 + brcmf_sdiod_writel(bus->sdiodev, core->base + reg_offset, regval, &ret);
277
278 return ret;
279 }
280 @@ -697,8 +697,7 @@ brcmf_sdio_kso_control(struct brcmf_sdio
281
282 wr_val = (on << SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
283 /* 1st KSO write goes to AOS wake up core if device is asleep */
284 - brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
285 - wr_val, &err);
286 + brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, wr_val, &err);
287
288 if (on) {
289 /* device WAKEUP through KSO:
290 @@ -724,7 +723,7 @@ brcmf_sdio_kso_control(struct brcmf_sdio
291 * just one write attempt may fail,
292 * read it back until it matches written value
293 */
294 - rd_val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
295 + rd_val = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
296 &err);
297 if (!err) {
298 if ((rd_val & bmask) == cmp_val)
299 @@ -734,9 +733,11 @@ brcmf_sdio_kso_control(struct brcmf_sdio
300 /* bail out upon subsequent access errors */
301 if (err && (err_cnt++ > BRCMF_SDIO_MAX_ACCESS_ERRORS))
302 break;
303 +
304 udelay(KSO_WAIT_US);
305 - brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
306 - wr_val, &err);
307 + brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, wr_val,
308 + &err);
309 +
310 } while (try_cnt++ < MAX_KSO_ATTEMPTS);
311
312 if (try_cnt > 2)
313 @@ -772,15 +773,15 @@ static int brcmf_sdio_htclk(struct brcmf
314 clkreq =
315 bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
316
317 - brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
318 - clkreq, &err);
319 + brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
320 + clkreq, &err);
321 if (err) {
322 brcmf_err("HT Avail request error: %d\n", err);
323 return -EBADE;
324 }
325
326 /* Check current status */
327 - clkctl = brcmf_sdiod_regrb(bus->sdiodev,
328 + clkctl = brcmf_sdiod_readb(bus->sdiodev,
329 SBSDIO_FUNC1_CHIPCLKCSR, &err);
330 if (err) {
331 brcmf_err("HT Avail read error: %d\n", err);
332 @@ -790,35 +791,34 @@ static int brcmf_sdio_htclk(struct brcmf
333 /* Go to pending and await interrupt if appropriate */
334 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
335 /* Allow only clock-available interrupt */
336 - devctl = brcmf_sdiod_regrb(bus->sdiodev,
337 + devctl = brcmf_sdiod_readb(bus->sdiodev,
338 SBSDIO_DEVICE_CTL, &err);
339 if (err) {
340 - brcmf_err("Devctl error setting CA: %d\n",
341 - err);
342 + brcmf_err("Devctl error setting CA: %d\n", err);
343 return -EBADE;
344 }
345
346 devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
347 - brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
348 - devctl, &err);
349 + brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_DEVICE_CTL,
350 + devctl, &err);
351 brcmf_dbg(SDIO, "CLKCTL: set PENDING\n");
352 bus->clkstate = CLK_PENDING;
353
354 return 0;
355 } else if (bus->clkstate == CLK_PENDING) {
356 /* Cancel CA-only interrupt filter */
357 - devctl = brcmf_sdiod_regrb(bus->sdiodev,
358 + devctl = brcmf_sdiod_readb(bus->sdiodev,
359 SBSDIO_DEVICE_CTL, &err);
360 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
361 - brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
362 - devctl, &err);
363 + brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_DEVICE_CTL,
364 + devctl, &err);
365 }
366
367 /* Otherwise, wait here (polling) for HT Avail */
368 timeout = jiffies +
369 msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
370 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
371 - clkctl = brcmf_sdiod_regrb(bus->sdiodev,
372 + clkctl = brcmf_sdiod_readb(bus->sdiodev,
373 SBSDIO_FUNC1_CHIPCLKCSR,
374 &err);
375 if (time_after(jiffies, timeout))
376 @@ -852,16 +852,16 @@ static int brcmf_sdio_htclk(struct brcmf
377
378 if (bus->clkstate == CLK_PENDING) {
379 /* Cancel CA-only interrupt filter */
380 - devctl = brcmf_sdiod_regrb(bus->sdiodev,
381 + devctl = brcmf_sdiod_readb(bus->sdiodev,
382 SBSDIO_DEVICE_CTL, &err);
383 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
384 - brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
385 - devctl, &err);
386 + brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_DEVICE_CTL,
387 + devctl, &err);
388 }
389
390 bus->clkstate = CLK_SDONLY;
391 - brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
392 - clkreq, &err);
393 + brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
394 + clkreq, &err);
395 brcmf_dbg(SDIO, "CLKCTL: turned OFF\n");
396 if (err) {
397 brcmf_err("Failed access turning clock off: %d\n",
398 @@ -951,14 +951,14 @@ brcmf_sdio_bus_sleep(struct brcmf_sdio *
399
400 /* Going to sleep */
401 if (sleep) {
402 - clkcsr = brcmf_sdiod_regrb(bus->sdiodev,
403 + clkcsr = brcmf_sdiod_readb(bus->sdiodev,
404 SBSDIO_FUNC1_CHIPCLKCSR,
405 &err);
406 if ((clkcsr & SBSDIO_CSR_MASK) == 0) {
407 brcmf_dbg(SDIO, "no clock, set ALP\n");
408 - brcmf_sdiod_regwb(bus->sdiodev,
409 - SBSDIO_FUNC1_CHIPCLKCSR,
410 - SBSDIO_ALP_AVAIL_REQ, &err);
411 + brcmf_sdiod_writeb(bus->sdiodev,
412 + SBSDIO_FUNC1_CHIPCLKCSR,
413 + SBSDIO_ALP_AVAIL_REQ, &err);
414 }
415 err = brcmf_sdio_kso_control(bus, false);
416 } else {
417 @@ -1178,16 +1178,16 @@ static void brcmf_sdio_rxfail(struct brc
418 if (abort)
419 brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
420
421 - brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
422 - SFC_RF_TERM, &err);
423 + brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL, SFC_RF_TERM,
424 + &err);
425 bus->sdcnt.f1regdata++;
426
427 /* Wait until the packet has been flushed (device/FIFO stable) */
428 for (lastrbc = retries = 0xffff; retries > 0; retries--) {
429 - hi = brcmf_sdiod_regrb(bus->sdiodev,
430 - SBSDIO_FUNC1_RFRAMEBCHI, &err);
431 - lo = brcmf_sdiod_regrb(bus->sdiodev,
432 - SBSDIO_FUNC1_RFRAMEBCLO, &err);
433 + hi = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_RFRAMEBCHI,
434 + &err);
435 + lo = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_RFRAMEBCLO,
436 + &err);
437 bus->sdcnt.f1regdata += 2;
438
439 if ((hi == 0) && (lo == 0))
440 @@ -1229,12 +1229,12 @@ static void brcmf_sdio_txfail(struct brc
441 bus->sdcnt.tx_sderrs++;
442
443 brcmf_sdiod_abort(sdiodev, SDIO_FUNC_2);
444 - brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM, NULL);
445 + brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM, NULL);
446 bus->sdcnt.f1regdata++;
447
448 for (i = 0; i < 3; i++) {
449 - hi = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_WFRAMEBCHI, NULL);
450 - lo = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_WFRAMEBCLO, NULL);
451 + hi = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_WFRAMEBCHI, NULL);
452 + lo = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_WFRAMEBCLO, NULL);
453 bus->sdcnt.f1regdata += 2;
454 if ((hi == 0) && (lo == 0))
455 break;
456 @@ -2446,11 +2446,11 @@ static void brcmf_sdio_bus_stop(struct d
457 bus->hostintmask = 0;
458
459 /* Force backplane clocks to assure F2 interrupt propagates */
460 - saveclk = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
461 + saveclk = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
462 &err);
463 if (!err)
464 - brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
465 - (saveclk | SBSDIO_FORCE_HT), &err);
466 + brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
467 + (saveclk | SBSDIO_FORCE_HT), &err);
468 if (err)
469 brcmf_err("Failed to force clock for F2: err %d\n",
470 err);
471 @@ -2509,7 +2509,7 @@ static int brcmf_sdio_intr_rstatus(struc
472 buscore = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
473 addr = buscore->base + offsetof(struct sdpcmd_regs, intstatus);
474
475 - val = brcmf_sdiod_regrl(bus->sdiodev, addr, &ret);
476 + val = brcmf_sdiod_readl(bus->sdiodev, addr, &ret);
477 bus->sdcnt.f1regdata++;
478 if (ret != 0)
479 return ret;
480 @@ -2519,7 +2519,7 @@ static int brcmf_sdio_intr_rstatus(struc
481
482 /* Clear interrupts */
483 if (val) {
484 - brcmf_sdiod_regwl(bus->sdiodev, addr, val, &ret);
485 + brcmf_sdiod_writel(bus->sdiodev, addr, val, &ret);
486 bus->sdcnt.f1regdata++;
487 atomic_or(val, &bus->intstatus);
488 }
489 @@ -2545,23 +2545,23 @@ static void brcmf_sdio_dpc(struct brcmf_
490
491 #ifdef DEBUG
492 /* Check for inconsistent device control */
493 - devctl = brcmf_sdiod_regrb(bus->sdiodev,
494 - SBSDIO_DEVICE_CTL, &err);
495 + devctl = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_DEVICE_CTL,
496 + &err);
497 #endif /* DEBUG */
498
499 /* Read CSR, if clock on switch to AVAIL, else ignore */
500 - clkctl = brcmf_sdiod_regrb(bus->sdiodev,
501 + clkctl = brcmf_sdiod_readb(bus->sdiodev,
502 SBSDIO_FUNC1_CHIPCLKCSR, &err);
503
504 brcmf_dbg(SDIO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
505 devctl, clkctl);
506
507 if (SBSDIO_HTAV(clkctl)) {
508 - devctl = brcmf_sdiod_regrb(bus->sdiodev,
509 + devctl = brcmf_sdiod_readb(bus->sdiodev,
510 SBSDIO_DEVICE_CTL, &err);
511 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
512 - brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
513 - devctl, &err);
514 + brcmf_sdiod_writeb(bus->sdiodev,
515 + SBSDIO_DEVICE_CTL, devctl, &err);
516 bus->clkstate = CLK_AVAIL;
517 }
518 }
519 @@ -3347,31 +3347,31 @@ static void brcmf_sdio_sr_init(struct br
520
521 brcmf_dbg(TRACE, "Enter\n");
522
523 - val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, &err);
524 + val = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, &err);
525 if (err) {
526 brcmf_err("error reading SBSDIO_FUNC1_WAKEUPCTRL\n");
527 return;
528 }
529
530 val |= 1 << SBSDIO_FUNC1_WCTRL_HTWAIT_SHIFT;
531 - brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, val, &err);
532 + brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, val, &err);
533 if (err) {
534 brcmf_err("error writing SBSDIO_FUNC1_WAKEUPCTRL\n");
535 return;
536 }
537
538 /* Add CMD14 Support */
539 - brcmf_sdiod_regwb(bus->sdiodev, SDIO_CCCR_BRCM_CARDCAP,
540 - (SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT |
541 - SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT),
542 - &err);
543 + brcmf_sdiod_func0_wb(bus->sdiodev, SDIO_CCCR_BRCM_CARDCAP,
544 + (SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT |
545 + SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT),
546 + &err);
547 if (err) {
548 brcmf_err("error writing SDIO_CCCR_BRCM_CARDCAP\n");
549 return;
550 }
551
552 - brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
553 - SBSDIO_FORCE_HT, &err);
554 + brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
555 + SBSDIO_FORCE_HT, &err);
556 if (err) {
557 brcmf_err("error writing SBSDIO_FUNC1_CHIPCLKCSR\n");
558 return;
559 @@ -3394,7 +3394,7 @@ static int brcmf_sdio_kso_init(struct br
560 if (brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV)->rev < 12)
561 return 0;
562
563 - val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, &err);
564 + val = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, &err);
565 if (err) {
566 brcmf_err("error reading SBSDIO_FUNC1_SLEEPCSR\n");
567 return err;
568 @@ -3403,8 +3403,8 @@ static int brcmf_sdio_kso_init(struct br
569 if (!(val & SBSDIO_FUNC1_SLEEPCSR_KSO_MASK)) {
570 val |= (SBSDIO_FUNC1_SLEEPCSR_KSO_EN <<
571 SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
572 - brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
573 - val, &err);
574 + brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
575 + val, &err);
576 if (err) {
577 brcmf_err("error writing SBSDIO_FUNC1_SLEEPCSR\n");
578 return err;
579 @@ -3565,9 +3565,9 @@ static void brcmf_sdio_bus_watchdog(stru
580 u8 devpend;
581
582 sdio_claim_host(bus->sdiodev->func[1]);
583 - devpend = brcmf_sdiod_regrb(bus->sdiodev,
584 - SDIO_CCCR_INTx,
585 - NULL);
586 + devpend = brcmf_sdiod_func0_rb(bus->sdiodev,
587 + SDIO_CCCR_INTx,
588 + NULL);
589 sdio_release_host(bus->sdiodev->func[1]);
590 intstatus = devpend & (INTR_STATUS_FUNC1 |
591 INTR_STATUS_FUNC2);
592 @@ -3705,12 +3705,12 @@ brcmf_sdio_drivestrengthinit(struct brcm
593 }
594 }
595 addr = CORE_CC_REG(pmu->base, chipcontrol_addr);
596 - brcmf_sdiod_regwl(sdiodev, addr, 1, NULL);
597 - cc_data_temp = brcmf_sdiod_regrl(sdiodev, addr, NULL);
598 + brcmf_sdiod_writel(sdiodev, addr, 1, NULL);
599 + cc_data_temp = brcmf_sdiod_readl(sdiodev, addr, NULL);
600 cc_data_temp &= ~str_mask;
601 drivestrength_sel <<= str_shift;
602 cc_data_temp |= drivestrength_sel;
603 - brcmf_sdiod_regwl(sdiodev, addr, cc_data_temp, NULL);
604 + brcmf_sdiod_writel(sdiodev, addr, cc_data_temp, NULL);
605
606 brcmf_dbg(INFO, "SDIO: %d mA (req=%d mA) drive strength selected, set to 0x%08x\n",
607 str_tab[i].strength, drivestrength, cc_data_temp);
608 @@ -3725,7 +3725,7 @@ static int brcmf_sdio_buscoreprep(void *
609
610 /* Try forcing SDIO core to do ALPAvail request only */
611 clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_ALP_AVAIL_REQ;
612 - brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
613 + brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
614 if (err) {
615 brcmf_err("error writing for HT off\n");
616 return err;
617 @@ -3733,8 +3733,7 @@ static int brcmf_sdio_buscoreprep(void *
618
619 /* If register supported, wait for ALPAvail and then force ALP */
620 /* This may take up to 15 milliseconds */
621 - clkval = brcmf_sdiod_regrb(sdiodev,
622 - SBSDIO_FUNC1_CHIPCLKCSR, NULL);
623 + clkval = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, NULL);
624
625 if ((clkval & ~SBSDIO_AVBITS) != clkset) {
626 brcmf_err("ChipClkCSR access: wrote 0x%02x read 0x%02x\n",
627 @@ -3742,10 +3741,11 @@ static int brcmf_sdio_buscoreprep(void *
628 return -EACCES;
629 }
630
631 - SPINWAIT(((clkval = brcmf_sdiod_regrb(sdiodev,
632 - SBSDIO_FUNC1_CHIPCLKCSR, NULL)),
633 - !SBSDIO_ALPAV(clkval)),
634 - PMU_MAX_TRANSITION_DLY);
635 + SPINWAIT(((clkval = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
636 + NULL)),
637 + !SBSDIO_ALPAV(clkval)),
638 + PMU_MAX_TRANSITION_DLY);
639 +
640 if (!SBSDIO_ALPAV(clkval)) {
641 brcmf_err("timeout on ALPAV wait, clkval 0x%02x\n",
642 clkval);
643 @@ -3753,11 +3753,11 @@ static int brcmf_sdio_buscoreprep(void *
644 }
645
646 clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_FORCE_ALP;
647 - brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
648 + brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
649 udelay(65);
650
651 /* Also, disable the extra SDIO pull-ups */
652 - brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_SDIOPULLUP, 0, NULL);
653 + brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_SDIOPULLUP, 0, NULL);
654
655 return 0;
656 }
657 @@ -3772,7 +3772,7 @@ static void brcmf_sdio_buscore_activate(
658 /* clear all interrupts */
659 core = brcmf_chip_get_core(chip, BCMA_CORE_SDIO_DEV);
660 reg_addr = core->base + offsetof(struct sdpcmd_regs, intstatus);
661 - brcmf_sdiod_regwl(sdiodev, reg_addr, 0xFFFFFFFF, NULL);
662 + brcmf_sdiod_writel(sdiodev, reg_addr, 0xFFFFFFFF, NULL);
663
664 if (rstvec)
665 /* Write reset vector to address 0 */
666 @@ -3785,7 +3785,7 @@ static u32 brcmf_sdio_buscore_read32(voi
667 struct brcmf_sdio_dev *sdiodev = ctx;
668 u32 val, rev;
669
670 - val = brcmf_sdiod_regrl(sdiodev, addr, NULL);
671 + val = brcmf_sdiod_readl(sdiodev, addr, NULL);
672 if ((sdiodev->func[0]->device == SDIO_DEVICE_ID_BROADCOM_4335_4339 ||
673 sdiodev->func[0]->device == SDIO_DEVICE_ID_BROADCOM_4339) &&
674 addr == CORE_CC_REG(SI_ENUM_BASE, chipid)) {
675 @@ -3802,7 +3802,7 @@ static void brcmf_sdio_buscore_write32(v
676 {
677 struct brcmf_sdio_dev *sdiodev = ctx;
678
679 - brcmf_sdiod_regwl(sdiodev, addr, val, NULL);
680 + brcmf_sdiod_writel(sdiodev, addr, val, NULL);
681 }
682
683 static const struct brcmf_buscore_ops brcmf_sdio_buscore_ops = {
684 @@ -3826,18 +3826,18 @@ brcmf_sdio_probe_attach(struct brcmf_sdi
685 sdio_claim_host(sdiodev->func[1]);
686
687 pr_debug("F1 signature read @0x18000000=0x%4x\n",
688 - brcmf_sdiod_regrl(sdiodev, SI_ENUM_BASE, NULL));
689 + brcmf_sdiod_readl(sdiodev, SI_ENUM_BASE, NULL));
690
691 /*
692 * Force PLL off until brcmf_chip_attach()
693 * programs PLL control regs
694 */
695
696 - brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
697 - BRCMF_INIT_CLKCTL1, &err);
698 + brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, BRCMF_INIT_CLKCTL1,
699 + &err);
700 if (!err)
701 - clkctl = brcmf_sdiod_regrb(sdiodev,
702 - SBSDIO_FUNC1_CHIPCLKCSR, &err);
703 + clkctl = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
704 + &err);
705
706 if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
707 brcmf_err("ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
708 @@ -3897,25 +3897,25 @@ brcmf_sdio_probe_attach(struct brcmf_sdi
709 brcmf_sdio_drivestrengthinit(sdiodev, bus->ci, drivestrength);
710
711 /* Set card control so an SDIO card reset does a WLAN backplane reset */
712 - reg_val = brcmf_sdiod_regrb(sdiodev, SDIO_CCCR_BRCM_CARDCTRL, &err);
713 + reg_val = brcmf_sdiod_func0_rb(sdiodev, SDIO_CCCR_BRCM_CARDCTRL, &err);
714 if (err)
715 goto fail;
716
717 reg_val |= SDIO_CCCR_BRCM_CARDCTRL_WLANRESET;
718
719 - brcmf_sdiod_regwb(sdiodev, SDIO_CCCR_BRCM_CARDCTRL, reg_val, &err);
720 + brcmf_sdiod_func0_wb(sdiodev, SDIO_CCCR_BRCM_CARDCTRL, reg_val, &err);
721 if (err)
722 goto fail;
723
724 /* set PMUControl so a backplane reset does PMU state reload */
725 reg_addr = CORE_CC_REG(brcmf_chip_get_pmu(bus->ci)->base, pmucontrol);
726 - reg_val = brcmf_sdiod_regrl(sdiodev, reg_addr, &err);
727 + reg_val = brcmf_sdiod_readl(sdiodev, reg_addr, &err);
728 if (err)
729 goto fail;
730
731 reg_val |= (BCMA_CC_PMU_CTL_RES_RELOAD << BCMA_CC_PMU_CTL_RES_SHIFT);
732
733 - brcmf_sdiod_regwl(sdiodev, reg_addr, reg_val, &err);
734 + brcmf_sdiod_writel(sdiodev, reg_addr, reg_val, &err);
735 if (err)
736 goto fail;
737
738 @@ -4055,10 +4055,10 @@ static void brcmf_sdio_firmware_callback
739 goto release;
740
741 /* Force clocks on backplane to be sure F2 interrupt propagates */
742 - saveclk = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, &err);
743 + saveclk = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, &err);
744 if (!err) {
745 - brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
746 - (saveclk | SBSDIO_FORCE_HT), &err);
747 + brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
748 + (saveclk | SBSDIO_FORCE_HT), &err);
749 }
750 if (err) {
751 brcmf_err("Failed to force clock for F2: err %d\n", err);
752 @@ -4080,7 +4080,7 @@ static void brcmf_sdio_firmware_callback
753 w_sdreg32(bus, bus->hostintmask,
754 offsetof(struct sdpcmd_regs, hostintmask));
755
756 - brcmf_sdiod_regwb(sdiodev, SBSDIO_WATERMARK, 8, &err);
757 + brcmf_sdiod_writeb(sdiodev, SBSDIO_WATERMARK, 8, &err);
758 } else {
759 /* Disable F2 again */
760 sdio_disable_func(sdiodev->func[SDIO_FUNC_2]);
761 @@ -4091,8 +4091,8 @@ static void brcmf_sdio_firmware_callback
762 brcmf_sdio_sr_init(bus);
763 } else {
764 /* Restore previous clock setting */
765 - brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
766 - saveclk, &err);
767 + brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
768 + saveclk, &err);
769 }
770
771 if (err == 0) {
772 @@ -4225,7 +4225,7 @@ struct brcmf_sdio *brcmf_sdio_probe(stru
773 bus->rxflow = false;
774
775 /* Done with backplane-dependent accesses, can drop clock... */
776 - brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
777 + brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
778
779 sdio_release_host(bus->sdiodev->func[1]);
780
781 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.h
782 +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.h
783 @@ -50,6 +50,7 @@
784 #define SBSDIO_NUM_FUNCTION 3
785
786 /* function 0 vendor specific CCCR registers */
787 +
788 #define SDIO_CCCR_BRCM_CARDCAP 0xf0
789 #define SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT 0x02
790 #define SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT 0x04
791 @@ -131,8 +132,6 @@
792 /* with b15, maps to 32-bit SB access */
793 #define SBSDIO_SB_ACCESS_2_4B_FLAG 0x08000
794
795 -/* valid bits in SBSDIO_FUNC1_SBADDRxxx regs */
796 -
797 /* Address bits from SBADDR regs */
798 #define SBSDIO_SBWINDOW_MASK 0xffff8000
799
800 @@ -293,13 +292,24 @@ struct sdpcmd_regs {
801 int brcmf_sdiod_intr_register(struct brcmf_sdio_dev *sdiodev);
802 void brcmf_sdiod_intr_unregister(struct brcmf_sdio_dev *sdiodev);
803
804 -/* sdio device register access interface */
805 -u8 brcmf_sdiod_regrb(struct brcmf_sdio_dev *sdiodev, u32 addr, int *ret);
806 -u32 brcmf_sdiod_regrl(struct brcmf_sdio_dev *sdiodev, u32 addr, int *ret);
807 -void brcmf_sdiod_regwb(struct brcmf_sdio_dev *sdiodev, u32 addr, u8 data,
808 - int *ret);
809 -void brcmf_sdiod_regwl(struct brcmf_sdio_dev *sdiodev, u32 addr, u32 data,
810 - int *ret);
811 +/* SDIO device register access interface */
812 +/* Accessors for SDIO Function 0 */
813 +#define brcmf_sdiod_func0_rb(sdiodev, addr, r) \
814 + sdio_readb((sdiodev)->func[0], (addr), (r))
815 +
816 +#define brcmf_sdiod_func0_wb(sdiodev, addr, v, ret) \
817 + sdio_writeb((sdiodev)->func[0], (v), (addr), (ret))
818 +
819 +/* Accessors for SDIO Function 1 */
820 +#define brcmf_sdiod_readb(sdiodev, addr, r) \
821 + sdio_readb((sdiodev)->func[1], (addr), (r))
822 +
823 +#define brcmf_sdiod_writeb(sdiodev, addr, v, ret) \
824 + sdio_writeb((sdiodev)->func[1], (v), (addr), (ret))
825 +
826 +u32 brcmf_sdiod_readl(struct brcmf_sdio_dev *sdiodev, u32 addr, int *ret);
827 +void brcmf_sdiod_writel(struct brcmf_sdio_dev *sdiodev, u32 addr, u32 data,
828 + int *ret);
829
830 /* Buffer transfer to/from device (client) core via cmd53.
831 * fn: function number
Staging tree of Mathias Kresin