1 From 8ab5f1fbd39c29125403678a0caf0a71046da361 Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
3 Date: Mon, 6 Jun 2016 09:43:49 +0200
4 Subject: [PATCH 1/2] ARM: BCM5301X: Specify NAND chip select and ECC in
7 Content-Type: text/plain; charset=UTF-8
8 Content-Transfer-Encoding: 8bit
10 Using separated file with common chip select parameters will allow us
11 adding other ECC setups without code duplication.
13 Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
14 Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
16 arch/arm/boot/dts/bcm5301x-nand-cs0-bch8.dtsi | 16 +++++-----------
17 arch/arm/boot/dts/bcm5301x-nand-cs0.dtsi | 18 ++++++++++++++++++
18 2 files changed, 23 insertions(+), 11 deletions(-)
19 create mode 100644 arch/arm/boot/dts/bcm5301x-nand-cs0.dtsi
21 --- a/arch/arm/boot/dts/bcm5301x-nand-cs0-bch8.dtsi
22 +++ b/arch/arm/boot/dts/bcm5301x-nand-cs0-bch8.dtsi
24 * Licensed under the GNU/GPL. See COPYING for details.
30 - compatible = "brcm,nandcs";
32 - #address-cells = <1>;
34 +#include "bcm5301x-nand-cs0.dtsi"
36 - nand-ecc-strength = <8>;
37 - nand-ecc-step-size = <512>;
41 + nand-ecc-algo = "bch";
42 + nand-ecc-strength = <8>;
43 + nand-ecc-step-size = <512>;
46 +++ b/arch/arm/boot/dts/bcm5301x-nand-cs0.dtsi
49 + * Broadcom Northstar NAND.
51 + * Copyright (C) 2015 Hauke Mehrtens <hauke@hauke-m.de>
53 + * Licensed under the GNU/GPL. See COPYING for details.
59 + compatible = "brcm,nandcs";
61 + #address-cells = <1>;