75f16a167373e23cf5cc15b8da8d9dd4772d1530
[openwrt/staging/blocktrron.git] /
1 From e78a40eb24187a8b4f9b89e2181f674df39c2013 Mon Sep 17 00:00:00 2001
2 From: Robert Marko <robimarko@gmail.com>
3 Date: Mon, 7 Nov 2022 14:29:00 +0100
4 Subject: [PATCH] dt-bindings: clock: qcom: ipq8074: add missing networking
5 resets
6
7 Add bindings for the missing networking resets found in IPQ8074 GCC.
8
9 Signed-off-by: Robert Marko <robimarko@gmail.com>
10 Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
11 Signed-off-by: Bjorn Andersson <andersson@kernel.org>
12 Link: https://lore.kernel.org/r/20221107132901.489240-2-robimarko@gmail.com
13 ---
14 include/dt-bindings/clock/qcom,gcc-ipq8074.h | 14 ++++++++++++++
15 1 file changed, 14 insertions(+)
16
17 --- a/include/dt-bindings/clock/qcom,gcc-ipq8074.h
18 +++ b/include/dt-bindings/clock/qcom,gcc-ipq8074.h
19 @@ -367,6 +367,20 @@
20 #define GCC_PCIE1_AHB_ARES 129
21 #define GCC_PCIE1_AXI_MASTER_STICKY_ARES 130
22 #define GCC_PCIE0_AXI_SLAVE_STICKY_ARES 131
23 +#define GCC_PPE_FULL_RESET 132
24 +#define GCC_UNIPHY0_SOFT_RESET 133
25 +#define GCC_UNIPHY0_XPCS_RESET 134
26 +#define GCC_UNIPHY1_SOFT_RESET 135
27 +#define GCC_UNIPHY1_XPCS_RESET 136
28 +#define GCC_UNIPHY2_SOFT_RESET 137
29 +#define GCC_UNIPHY2_XPCS_RESET 138
30 +#define GCC_EDMA_HW_RESET 139
31 +#define GCC_NSSPORT1_RESET 140
32 +#define GCC_NSSPORT2_RESET 141
33 +#define GCC_NSSPORT3_RESET 142
34 +#define GCC_NSSPORT4_RESET 143
35 +#define GCC_NSSPORT5_RESET 144
36 +#define GCC_NSSPORT6_RESET 145
37
38 #define USB0_GDSC 0
39 #define USB1_GDSC 1