git.openwrt.org Git - openwrt/staging/ynezz.git/blob

   1 From df8cea437a14a4a412a32058ca49a2b30b48cc71 Mon Sep 17 00:00:00 2001
   2 From: Chuanhua Han <chuanhua.han@nxp.com>
   3 Date: Fri, 26 Oct 2018 12:08:55 +0800
   4 Subject: [PATCH] arm64: dts: lx2160a: add dspi controller DT nodes
   5
   6 Add the dspi support on lx2160
   7
   8 Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
   9 Signed-off-by: Bao Xiaowei <xiaowei.bao@nxp.com>
  10 Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
  11 ---
  12  arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 39 ++++++++++++++++++++++++++
  13  1 file changed, 39 insertions(+)
  14
  15 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
  16 +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
  17 @@ -603,6 +603,45 @@
  18                         status = "disabled";
  19                 };
  20
  21 +               dspi0: spi@2100000 {
  22 +                       compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi";
  23 +                       #address-cells = <1>;
  24 +                       #size-cells = <0>;
  25 +                       reg = <0x0 0x2100000 0x0 0x10000>;
  26 +                       interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
  27 +                       clocks = <&clockgen 4 7>;
  28 +                       clock-names = "dspi";
  29 +                       spi-num-chipselects = <5>;
  30 +                       bus-num = <0>;
  31 +                       status = "disabled";
  32 +               };
  33 +
  34 +               dspi1: spi@2110000 {
  35 +                       compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi";
  36 +                       #address-cells = <1>;
  37 +                       #size-cells = <0>;
  38 +                       reg = <0x0 0x2110000 0x0 0x10000>;
  39 +                       interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
  40 +                       clocks = <&clockgen 4 7>;
  41 +                       clock-names = "dspi";
  42 +                       spi-num-chipselects = <5>;
  43 +                       bus-num = <1>;
  44 +                       status = "disabled";
  45 +               };
  46 +
  47 +               dspi2: spi@2120000 {
  48 +                       compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi";
  49 +                       #address-cells = <1>;
  50 +                       #size-cells = <0>;
  51 +                       reg = <0x0 0x2120000 0x0 0x10000>;
  52 +                       interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
  53 +                       clocks = <&clockgen 4 7>;
  54 +                       clock-names = "dspi";
  55 +                       spi-num-chipselects = <5>;
  56 +                       bus-num = <2>;
  57 +                       status = "disabled";
  58 +               };
  59 +
  60                 esdhc0: esdhc@2140000 {
  61                         compatible = "fsl,esdhc";
  62                         reg = <0x0 0x2140000 0x0 0x10000>;