748a6d9bc6d1f174375f81f540ca6691c03e457c
[openwrt/staging/neocturne.git] /
1 From 3fed02d930597c53f1c8500aff14581bb87a1e3d Mon Sep 17 00:00:00 2001
2 From: Weijie Gao <weijie.gao@mediatek.com>
3 Date: Fri, 20 May 2022 11:22:31 +0800
4 Subject: [PATCH 07/25] doc: mediatek: add documentation for mt7621 reference
5 boards
6
7 The MT7621 requires external binary blob being executed during u-boot's
8 boot-up flow. It's necessary to provide a guide here for users to correctly
9 build the u-boot.
10
11 Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
12 Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
13 ---
14 doc/board/index.rst | 1 +
15 doc/board/mediatek/index.rst | 9 +++++++
16 doc/board/mediatek/mt7621.rst | 48 +++++++++++++++++++++++++++++++++++
17 3 files changed, 58 insertions(+)
18 create mode 100644 doc/board/mediatek/index.rst
19 create mode 100644 doc/board/mediatek/mt7621.rst
20
21 --- a/doc/board/index.rst
22 +++ b/doc/board/index.rst
23 @@ -23,6 +23,7 @@ Board-specific doc
24 highbank/index
25 intel/index
26 kontron/index
27 + mediatek/index
28 microchip/index
29 nokia/index
30 nxp/index
31 --- /dev/null
32 +++ b/doc/board/mediatek/index.rst
33 @@ -0,0 +1,9 @@
34 +.. SPDX-License-Identifier: GPL-2.0+
35 +
36 +Mediatek
37 +=========
38 +
39 +.. toctree::
40 + :maxdepth: 2
41 +
42 + mt7621
43 --- /dev/null
44 +++ b/doc/board/mediatek/mt7621.rst
45 @@ -0,0 +1,48 @@
46 +.. SPDX-License-Identifier: GPL-2.0
47 +
48 +mt7621_rfb/mt7621_nand_rfb
49 +==========================
50 +
51 +U-Boot for the MediaTek MT7621 boards
52 +
53 +Quick Start
54 +-----------
55 +
56 +- Get the DDR initialization binary blob
57 +- Configure CPU and DDR parameters
58 +- Build U-Boot
59 +
60 +Get the DDR initialization binary blob
61 +--------------------------------------
62 +
63 +Download one from:
64 + - https://raw.githubusercontent.com/mtk-openwrt/mt7621-lowlevel-preloader/master/mt7621_stage_sram.bin
65 + - https://raw.githubusercontent.com/mtk-openwrt/mt7621-lowlevel-preloader/master/mt7621_stage_sram_noprint.bin
66 +
67 +mt7621_stage_sram_noprint.bin has removed all output logs. To use this one,
68 +download and rename it to mt7621_stage_sram.bin
69 +
70 +Put the binary blob to the u-boot build directory.
71 +
72 +Configure CPU and DDR parameters
73 +--------------------------------
74 +
75 +menuconfig > MIPS architecture > MediaTek MIPS platforms > CPU & DDR configuration
76 +
77 +Select the correct DDR timing parameters for your board. The size shown here
78 +must match the DDR size of you board.
79 +
80 +The frequency of CPU and DDR can also be adjusted.
81 +
82 +Build U-Boot
83 +------------
84 +
85 +.. code-block:: bash
86 +
87 + $ export CROSS_COMPILE=mipsel-linux-
88 + $ make O=build mt7621_rfb_defconfig # or mt7621_nand_rfb_defconfig
89 + $ cp mt7621_stage_sram.bin ./build/mt7621_stage_sram.bin
90 + $ # or cp mt7621_stage_sram_noprint.bin ./build/mt7621_stage_sram.bin
91 + $ make O=build
92 +
93 +Burn the u-boot-mt7621.bin to the SPI-NOR or NAND flash.