projects / openwrt / staging / noltari.git / blob
? search:


73c8b414da5fdf9bfbf933280c8e970d467a1ea0
[openwrt/staging/noltari.git] /
1 From 34ae2c09d46a2d0abd907e139b466f798e4095a8 Mon Sep 17 00:00:00 2001
2 From: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
3 Date: Mon, 15 Nov 2021 10:00:27 +0000
4 Subject: [PATCH] net: phylink: add generic validate implementation
5
6 Add a generic validate() implementation using the supported_interfaces
7 and a bitmask of MAC pause/speed/duplex capabilities. This allows us
8 to entirely eliminate many driver private validate() implementations.
9
10 We expose the underlying phylink_get_linkmodes() function so that
11 drivers which have special needs can still benefit from conversion.
12
13 Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
14 Signed-off-by: David S. Miller <davem@davemloft.net>
15 ---
16 drivers/net/phy/phylink.c | 252 ++++++++++++++++++++++++++++++++++++++
17 include/linux/phylink.h | 31 +++++
18 2 files changed, 283 insertions(+)
19
20 --- a/drivers/net/phy/phylink.c
21 +++ b/drivers/net/phy/phylink.c
22 @@ -172,6 +172,258 @@ static int phylink_validate_mac_and_pcs(
23 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
24 }
25
26 +static void phylink_caps_to_linkmodes(unsigned long *linkmodes,
27 + unsigned long caps)
28 +{
29 + if (caps & MAC_SYM_PAUSE)
30 + __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes);
31 +
32 + if (caps & MAC_ASYM_PAUSE)
33 + __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes);
34 +
35 + if (caps & MAC_10HD)
36 + __set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes);
37 +
38 + if (caps & MAC_10FD)
39 + __set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes);
40 +
41 + if (caps & MAC_100HD) {
42 + __set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes);
43 + __set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes);
44 + }
45 +
46 + if (caps & MAC_100FD) {
47 + __set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes);
48 + __set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes);
49 + __set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes);
50 + }
51 +
52 + if (caps & MAC_1000HD)
53 + __set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes);
54 +
55 + if (caps & MAC_1000FD) {
56 + __set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes);
57 + __set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes);
58 + __set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes);
59 + }
60 +
61 + if (caps & MAC_2500FD) {
62 + __set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes);
63 + __set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes);
64 + }
65 +
66 + if (caps & MAC_5000FD)
67 + __set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes);
68 +
69 + if (caps & MAC_10000FD) {
70 + __set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes);
71 + __set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes);
72 + __set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes);
73 + __set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes);
74 + __set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes);
75 + __set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes);
76 + __set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes);
77 + __set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes);
78 + __set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes);
79 + }
80 +
81 + if (caps & MAC_25000FD) {
82 + __set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes);
83 + __set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes);
84 + __set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes);
85 + }
86 +
87 + if (caps & MAC_40000FD) {
88 + __set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes);
89 + __set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes);
90 + __set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes);
91 + __set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes);
92 + }
93 +
94 + if (caps & MAC_50000FD) {
95 + __set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes);
96 + __set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes);
97 + __set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes);
98 + __set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes);
99 + __set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes);
100 + __set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes);
101 + __set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT,
102 + linkmodes);
103 + __set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes);
104 + }
105 +
106 + if (caps & MAC_56000FD) {
107 + __set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes);
108 + __set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes);
109 + __set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes);
110 + __set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes);
111 + }
112 +
113 + if (caps & MAC_100000FD) {
114 + __set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes);
115 + __set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes);
116 + __set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes);
117 + __set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
118 + linkmodes);
119 + __set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes);
120 + __set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes);
121 + __set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes);
122 + __set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT,
123 + linkmodes);
124 + __set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes);
125 + __set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes);
126 + __set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes);
127 + __set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT,
128 + linkmodes);
129 + __set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes);
130 + __set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes);
131 + }
132 +
133 + if (caps & MAC_200000FD) {
134 + __set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes);
135 + __set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes);
136 + __set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT,
137 + linkmodes);
138 + __set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes);
139 + __set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes);
140 + __set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes);
141 + __set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes);
142 + __set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT,
143 + linkmodes);
144 + __set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes);
145 + __set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes);
146 + }
147 +
148 + if (caps & MAC_400000FD) {
149 + __set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes);
150 + __set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes);
151 + __set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT,
152 + linkmodes);
153 + __set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes);
154 + __set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes);
155 + __set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes);
156 + __set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes);
157 + __set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT,
158 + linkmodes);
159 + __set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes);
160 + __set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes);
161 + }
162 +}
163 +
164 +/**
165 + * phylink_get_linkmodes() - get acceptable link modes
166 + * @linkmodes: ethtool linkmode mask (must be already initialised)
167 + * @interface: phy interface mode defined by &typedef phy_interface_t
168 + * @mac_capabilities: bitmask of MAC capabilities
169 + *
170 + * Set all possible pause, speed and duplex linkmodes in @linkmodes that
171 + * are supported by the @interface mode and @mac_capabilities. @linkmodes
172 + * must have been initialised previously.
173 + */
174 +void phylink_get_linkmodes(unsigned long *linkmodes, phy_interface_t interface,
175 + unsigned long mac_capabilities)
176 +{
177 + unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE;
178 +
179 + switch (interface) {
180 + case PHY_INTERFACE_MODE_USXGMII:
181 + caps |= MAC_10000FD | MAC_5000FD | MAC_2500FD;
182 + fallthrough;
183 +
184 + case PHY_INTERFACE_MODE_RGMII_TXID:
185 + case PHY_INTERFACE_MODE_RGMII_RXID:
186 + case PHY_INTERFACE_MODE_RGMII_ID:
187 + case PHY_INTERFACE_MODE_RGMII:
188 + case PHY_INTERFACE_MODE_QSGMII:
189 + case PHY_INTERFACE_MODE_SGMII:
190 + case PHY_INTERFACE_MODE_GMII:
191 + caps |= MAC_1000HD | MAC_1000FD;
192 + fallthrough;
193 +
194 + case PHY_INTERFACE_MODE_REVRMII:
195 + case PHY_INTERFACE_MODE_RMII:
196 + case PHY_INTERFACE_MODE_REVMII:
197 + case PHY_INTERFACE_MODE_MII:
198 + caps |= MAC_10HD | MAC_10FD;
199 + fallthrough;
200 +
201 + case PHY_INTERFACE_MODE_100BASEX:
202 + caps |= MAC_100HD | MAC_100FD;
203 + break;
204 +
205 + case PHY_INTERFACE_MODE_TBI:
206 + case PHY_INTERFACE_MODE_MOCA:
207 + case PHY_INTERFACE_MODE_RTBI:
208 + case PHY_INTERFACE_MODE_1000BASEX:
209 + caps |= MAC_1000HD;
210 + fallthrough;
211 + case PHY_INTERFACE_MODE_TRGMII:
212 + caps |= MAC_1000FD;
213 + break;
214 +
215 + case PHY_INTERFACE_MODE_2500BASEX:
216 + caps |= MAC_2500FD;
217 + break;
218 +
219 + case PHY_INTERFACE_MODE_5GBASER:
220 + caps |= MAC_5000FD;
221 + break;
222 +
223 + case PHY_INTERFACE_MODE_XGMII:
224 + case PHY_INTERFACE_MODE_RXAUI:
225 + case PHY_INTERFACE_MODE_XAUI:
226 + case PHY_INTERFACE_MODE_10GBASER:
227 + case PHY_INTERFACE_MODE_10GKR:
228 + caps |= MAC_10000FD;
229 + break;
230 +
231 + case PHY_INTERFACE_MODE_25GBASER:
232 + caps |= MAC_25000FD;
233 + break;
234 +
235 + case PHY_INTERFACE_MODE_XLGMII:
236 + caps |= MAC_40000FD;
237 + break;
238 +
239 + case PHY_INTERFACE_MODE_INTERNAL:
240 + caps |= ~0;
241 + break;
242 +
243 + case PHY_INTERFACE_MODE_NA:
244 + case PHY_INTERFACE_MODE_MAX:
245 + case PHY_INTERFACE_MODE_SMII:
246 + break;
247 + }
248 +
249 + phylink_caps_to_linkmodes(linkmodes, caps & mac_capabilities);
250 +}
251 +EXPORT_SYMBOL_GPL(phylink_get_linkmodes);
252 +
253 +/**
254 + * phylink_generic_validate() - generic validate() callback implementation
255 + * @config: a pointer to a &struct phylink_config.
256 + * @supported: ethtool bitmask for supported link modes.
257 + * @state: a pointer to a &struct phylink_link_state.
258 + *
259 + * Generic implementation of the validate() callback that MAC drivers can
260 + * use when they pass the range of supported interfaces and MAC capabilities.
261 + * This makes use of phylink_get_linkmodes().
262 + */
263 +void phylink_generic_validate(struct phylink_config *config,
264 + unsigned long *supported,
265 + struct phylink_link_state *state)
266 +{
267 + __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
268 +
269 + phylink_set_port_modes(mask);
270 + phylink_set(mask, Autoneg);
271 + phylink_get_linkmodes(mask, state->interface, config->mac_capabilities);
272 +
273 + linkmode_and(supported, supported, mask);
274 + linkmode_and(state->advertising, state->advertising, mask);
275 +}
276 +EXPORT_SYMBOL_GPL(phylink_generic_validate);
277 +
278 static int phylink_validate_any(struct phylink *pl, unsigned long *supported,
279 struct phylink_link_state *state)
280 {
281 --- a/include/linux/phylink.h
282 +++ b/include/linux/phylink.h
283 @@ -20,6 +20,29 @@ enum {
284 MLO_AN_PHY = 0, /* Conventional PHY */
285 MLO_AN_FIXED, /* Fixed-link mode */
286 MLO_AN_INBAND, /* In-band protocol */
287 +
288 + MAC_SYM_PAUSE = BIT(0),
289 + MAC_ASYM_PAUSE = BIT(1),
290 + MAC_10HD = BIT(2),
291 + MAC_10FD = BIT(3),
292 + MAC_10 = MAC_10HD | MAC_10FD,
293 + MAC_100HD = BIT(4),
294 + MAC_100FD = BIT(5),
295 + MAC_100 = MAC_100HD | MAC_100FD,
296 + MAC_1000HD = BIT(6),
297 + MAC_1000FD = BIT(7),
298 + MAC_1000 = MAC_1000HD | MAC_1000FD,
299 + MAC_2500FD = BIT(8),
300 + MAC_5000FD = BIT(9),
301 + MAC_10000FD = BIT(10),
302 + MAC_20000FD = BIT(11),
303 + MAC_25000FD = BIT(12),
304 + MAC_40000FD = BIT(13),
305 + MAC_50000FD = BIT(14),
306 + MAC_56000FD = BIT(15),
307 + MAC_100000FD = BIT(16),
308 + MAC_200000FD = BIT(17),
309 + MAC_400000FD = BIT(18),
310 };
311
312 static inline bool phylink_autoneg_inband(unsigned int mode)
313 @@ -69,6 +92,7 @@ enum phylink_op_type {
314 * if MAC link is at %MLO_AN_FIXED mode.
315 * @supported_interfaces: bitmap describing which PHY_INTERFACE_MODE_xxx
316 * are supported by the MAC/PCS.
317 + * @mac_capabilities: MAC pause/speed/duplex capabilities.
318 */
319 struct phylink_config {
320 struct device *dev;
321 @@ -79,6 +103,7 @@ struct phylink_config {
322 void (*get_fixed_state)(struct phylink_config *config,
323 struct phylink_link_state *state);
324 DECLARE_PHY_INTERFACE_MASK(supported_interfaces);
325 + unsigned long mac_capabilities;
326 };
327
328 /**
329 @@ -460,6 +485,12 @@ void pcs_link_up(struct phylink_pcs *pcs
330 phy_interface_t interface, int speed, int duplex);
331 #endif
332
333 +void phylink_get_linkmodes(unsigned long *linkmodes, phy_interface_t interface,
334 + unsigned long mac_capabilities);
335 +void phylink_generic_validate(struct phylink_config *config,
336 + unsigned long *supported,
337 + struct phylink_link_state *state);
338 +
339 struct phylink *phylink_create(struct phylink_config *, struct fwnode_handle *,
340 phy_interface_t iface,
341 const struct phylink_mac_ops *mac_ops);
Staging tree of Alvaro Fernandez Rojas