git.openwrt.org Git - openwrt/staging/ldir.git/blob

   1 From ad9dc9e92367803a4f9576aea0dab110d03fc510 Mon Sep 17 00:00:00 2001
   2 From: Chen-Yu Tsai <wenst@chromium.org>
   3 Date: Tue, 28 Mar 2023 11:10:17 +0800
   4 Subject: [PATCH 14/42] thermal/drivers/mediatek/lvts_thermal: Fix sensor 1
   5  interrupt status bitmask
   6
   7 The binary representation for sensor 1 interrupt status was incorrectly
   8 assembled, when compared to the full table given in the same comment
   9 section. The conversion into hex was also incorrect, leading to
  10 incorrect interrupt status bitmask for sensor 1. This would cause the
  11 driver to incorrectly identify changes for sensor 1, when in fact it
  12 was sensor 0, or a sensor access time out.
  13
  14 Fix the binary and hex representations in the comments, and the actual
  15 bitmask macro.
  16
  17 Fixes: f5f633b18234 ("thermal/drivers/mediatek: Add the Low Voltage Thermal Sensor driver")
  18 Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
  19 Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
  20 Link: https://lore.kernel.org/r/20230328031017.1360976-1-wenst@chromium.org
  21 ---
  22  drivers/thermal/mediatek/lvts_thermal.c | 6 +++---
  23  1 file changed, 3 insertions(+), 3 deletions(-)
  24
  25 --- a/drivers/thermal/mediatek/lvts_thermal.c
  26 +++ b/drivers/thermal/mediatek/lvts_thermal.c
  27 @@ -66,7 +66,7 @@
  28  #define LVTS_MONINT_CONF                       0x9FBF7BDE
  29
  30  #define LVTS_INT_SENSOR0                       0x0009001F
  31 -#define LVTS_INT_SENSOR1                       0X000881F0
  32 +#define LVTS_INT_SENSOR1                       0x001203E0
  33  #define LVTS_INT_SENSOR2                       0x00247C00
  34  #define LVTS_INT_SENSOR3                       0x1FC00000
  35
  36 @@ -395,8 +395,8 @@ static irqreturn_t lvts_ctrl_irq_handler
  37          *                  => 0x1FC00000
  38          * sensor 2 interrupt: 0000 0000 0010 0100 0111 1100 0000 0000
  39          *                  => 0x00247C00
  40 -        * sensor 1 interrupt: 0000 0000 0001 0001 0000 0011 1110 0000
  41 -        *                  => 0X000881F0
  42 +        * sensor 1 interrupt: 0000 0000 0001 0010 0000 0011 1110 0000
  43 +        *                  => 0X001203E0
  44          * sensor 0 interrupt: 0000 0000 0000 1001 0000 0000 0001 1111
  45          *                  => 0x0009001F
  46          */