71fa3022d5581408be1fc2a216d644bfbe5f7d38
[openwrt/staging/dangole.git] /
1 From 040e926f5813a5f4cc18dbff7c942d1e52f368f2 Mon Sep 17 00:00:00 2001
2 From: Ansuel Smith <ansuelsmth@gmail.com>
3 Date: Tue, 19 Oct 2021 02:08:50 +0200
4 Subject: net: dsa: qca8k: tidy for loop in setup and add cpu port check
5
6 Tidy and organize qca8k setup function from multiple for loop.
7 Change for loop in bridge leave/join to scan all port and skip cpu port.
8 No functional change intended.
9
10 Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
11 Signed-off-by: David S. Miller <davem@davemloft.net>
12 ---
13 drivers/net/dsa/qca8k.c | 74 +++++++++++++++++++++++++++++--------------------
14 1 file changed, 44 insertions(+), 30 deletions(-)
15
16 --- a/drivers/net/dsa/qca8k.c
17 +++ b/drivers/net/dsa/qca8k.c
18 @@ -1122,28 +1122,34 @@ qca8k_setup(struct dsa_switch *ds)
19 if (ret)
20 dev_warn(priv->dev, "mib init failed");
21
22 - /* Enable QCA header mode on the cpu port */
23 - ret = qca8k_write(priv, QCA8K_REG_PORT_HDR_CTRL(cpu_port),
24 - QCA8K_PORT_HDR_CTRL_ALL << QCA8K_PORT_HDR_CTRL_TX_S |
25 - QCA8K_PORT_HDR_CTRL_ALL << QCA8K_PORT_HDR_CTRL_RX_S);
26 - if (ret) {
27 - dev_err(priv->dev, "failed enabling QCA header mode");
28 - return ret;
29 - }
30 -
31 - /* Disable forwarding by default on all ports */
32 + /* Initial setup of all ports */
33 for (i = 0; i < QCA8K_NUM_PORTS; i++) {
34 + /* Disable forwarding by default on all ports */
35 ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(i),
36 QCA8K_PORT_LOOKUP_MEMBER, 0);
37 if (ret)
38 return ret;
39 - }
40
41 - /* Disable MAC by default on all ports */
42 - for (i = 1; i < QCA8K_NUM_PORTS; i++)
43 - qca8k_port_set_status(priv, i, 0);
44 + /* Enable QCA header mode on all cpu ports */
45 + if (dsa_is_cpu_port(ds, i)) {
46 + ret = qca8k_write(priv, QCA8K_REG_PORT_HDR_CTRL(i),
47 + QCA8K_PORT_HDR_CTRL_ALL << QCA8K_PORT_HDR_CTRL_TX_S |
48 + QCA8K_PORT_HDR_CTRL_ALL << QCA8K_PORT_HDR_CTRL_RX_S);
49 + if (ret) {
50 + dev_err(priv->dev, "failed enabling QCA header mode");
51 + return ret;
52 + }
53 + }
54 +
55 + /* Disable MAC by default on all user ports */
56 + if (dsa_is_user_port(ds, i))
57 + qca8k_port_set_status(priv, i, 0);
58 + }
59
60 - /* Forward all unknown frames to CPU port for Linux processing */
61 + /* Forward all unknown frames to CPU port for Linux processing
62 + * Notice that in multi-cpu config only one port should be set
63 + * for igmp, unknown, multicast and broadcast packet
64 + */
65 ret = qca8k_write(priv, QCA8K_REG_GLOBAL_FW_CTRL1,
66 BIT(cpu_port) << QCA8K_GLOBAL_FW_CTRL1_IGMP_DP_S |
67 BIT(cpu_port) << QCA8K_GLOBAL_FW_CTRL1_BC_DP_S |
68 @@ -1152,11 +1158,13 @@ qca8k_setup(struct dsa_switch *ds)
69 if (ret)
70 return ret;
71
72 - /* Setup connection between CPU port & user ports */
73 + /* Setup connection between CPU port & user ports
74 + * Configure specific switch configuration for ports
75 + */
76 for (i = 0; i < QCA8K_NUM_PORTS; i++) {
77 /* CPU port gets connected to all user ports of the switch */
78 if (dsa_is_cpu_port(ds, i)) {
79 - ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(cpu_port),
80 + ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(i),
81 QCA8K_PORT_LOOKUP_MEMBER, dsa_user_ports(ds));
82 if (ret)
83 return ret;
84 @@ -1193,16 +1201,14 @@ qca8k_setup(struct dsa_switch *ds)
85 if (ret)
86 return ret;
87 }
88 - }
89
90 - /* The port 5 of the qca8337 have some problem in flood condition. The
91 - * original legacy driver had some specific buffer and priority settings
92 - * for the different port suggested by the QCA switch team. Add this
93 - * missing settings to improve switch stability under load condition.
94 - * This problem is limited to qca8337 and other qca8k switch are not affected.
95 - */
96 - if (priv->switch_id == QCA8K_ID_QCA8337) {
97 - for (i = 0; i < QCA8K_NUM_PORTS; i++) {
98 + /* The port 5 of the qca8337 have some problem in flood condition. The
99 + * original legacy driver had some specific buffer and priority settings
100 + * for the different port suggested by the QCA switch team. Add this
101 + * missing settings to improve switch stability under load condition.
102 + * This problem is limited to qca8337 and other qca8k switch are not affected.
103 + */
104 + if (priv->switch_id == QCA8K_ID_QCA8337) {
105 switch (i) {
106 /* The 2 CPU port and port 5 requires some different
107 * priority than any other ports.
108 @@ -1238,6 +1244,12 @@ qca8k_setup(struct dsa_switch *ds)
109 QCA8K_PORT_HOL_CTRL1_WRED_EN,
110 mask);
111 }
112 +
113 + /* Set initial MTU for every port.
114 + * We have only have a general MTU setting. So track
115 + * every port and set the max across all port.
116 + */
117 + priv->port_mtu[i] = ETH_FRAME_LEN + ETH_FCS_LEN;
118 }
119
120 /* Special GLOBAL_FC_THRESH value are needed for ar8327 switch */
121 @@ -1251,8 +1263,6 @@ qca8k_setup(struct dsa_switch *ds)
122 }
123
124 /* Setup our port MTUs to match power on defaults */
125 - for (i = 0; i < QCA8K_NUM_PORTS; i++)
126 - priv->port_mtu[i] = ETH_FRAME_LEN + ETH_FCS_LEN;
127 ret = qca8k_write(priv, QCA8K_MAX_FRAME_SIZE, ETH_FRAME_LEN + ETH_FCS_LEN);
128 if (ret)
129 dev_warn(priv->dev, "failed setting MTU settings");
130 @@ -1728,7 +1738,9 @@ qca8k_port_bridge_join(struct dsa_switch
131 cpu_port = dsa_to_port(ds, port)->cpu_dp->index;
132 port_mask = BIT(cpu_port);
133
134 - for (i = 1; i < QCA8K_NUM_PORTS; i++) {
135 + for (i = 0; i < QCA8K_NUM_PORTS; i++) {
136 + if (dsa_is_cpu_port(ds, i))
137 + continue;
138 if (dsa_to_port(ds, i)->bridge_dev != br)
139 continue;
140 /* Add this port to the portvlan mask of the other ports
141 @@ -1758,7 +1770,9 @@ qca8k_port_bridge_leave(struct dsa_switc
142
143 cpu_port = dsa_to_port(ds, port)->cpu_dp->index;
144
145 - for (i = 1; i < QCA8K_NUM_PORTS; i++) {
146 + for (i = 0; i < QCA8K_NUM_PORTS; i++) {
147 + if (dsa_is_cpu_port(ds, i))
148 + continue;
149 if (dsa_to_port(ds, i)->bridge_dev != br)
150 continue;
151 /* Remove this port to the portvlan mask of the other ports