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1 From: Lorenzo Bianconi <lorenzo@kernel.org>
2 Date: Mon, 18 Sep 2023 12:29:12 +0200
3 Subject: [PATCH] net: ethernet: mtk_wed: add mtk_wed_soc_data structure
4
5 Introduce mtk_wed_soc_data utility structure to contain per-SoC
6 definitions.
7
8 Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
9 Signed-off-by: Paolo Abeni <pabeni@redhat.com>
10 ---
11
12 --- a/drivers/net/ethernet/mediatek/mtk_wed.c
13 +++ b/drivers/net/ethernet/mediatek/mtk_wed.c
14 @@ -49,6 +49,26 @@ struct mtk_wed_flow_block_priv {
15 struct net_device *dev;
16 };
17
18 +static const struct mtk_wed_soc_data mt7622_data = {
19 + .regmap = {
20 + .tx_bm_tkid = 0x088,
21 + .wpdma_rx_ring0 = 0x770,
22 + .reset_idx_tx_mask = GENMASK(3, 0),
23 + .reset_idx_rx_mask = GENMASK(17, 16),
24 + },
25 + .wdma_desc_size = sizeof(struct mtk_wdma_desc),
26 +};
27 +
28 +static const struct mtk_wed_soc_data mt7986_data = {
29 + .regmap = {
30 + .tx_bm_tkid = 0x0c8,
31 + .wpdma_rx_ring0 = 0x770,
32 + .reset_idx_tx_mask = GENMASK(1, 0),
33 + .reset_idx_rx_mask = GENMASK(7, 6),
34 + },
35 + .wdma_desc_size = 2 * sizeof(struct mtk_wdma_desc),
36 +};
37 +
38 static void
39 wed_m32(struct mtk_wed_device *dev, u32 reg, u32 mask, u32 val)
40 {
41 @@ -747,7 +767,7 @@ mtk_wed_set_wpdma(struct mtk_wed_device
42 return;
43
44 wed_w32(dev, MTK_WED_WPDMA_RX_GLO_CFG, dev->wlan.wpdma_rx_glo);
45 - wed_w32(dev, MTK_WED_WPDMA_RX_RING, dev->wlan.wpdma_rx);
46 + wed_w32(dev, dev->hw->soc->regmap.wpdma_rx_ring0, dev->wlan.wpdma_rx);
47 }
48
49 static void
50 @@ -941,22 +961,10 @@ mtk_wed_hw_init(struct mtk_wed_device *d
51 wed_w32(dev, MTK_WED_TX_BM_BUF_LEN, MTK_WED_PKT_SIZE);
52
53 if (mtk_wed_is_v1(dev->hw)) {
54 - wed_w32(dev, MTK_WED_TX_BM_TKID,
55 - FIELD_PREP(MTK_WED_TX_BM_TKID_START,
56 - dev->wlan.token_start) |
57 - FIELD_PREP(MTK_WED_TX_BM_TKID_END,
58 - dev->wlan.token_start +
59 - dev->wlan.nbuf - 1));
60 wed_w32(dev, MTK_WED_TX_BM_DYN_THR,
61 FIELD_PREP(MTK_WED_TX_BM_DYN_THR_LO, 1) |
62 MTK_WED_TX_BM_DYN_THR_HI);
63 } else {
64 - wed_w32(dev, MTK_WED_TX_BM_TKID_V2,
65 - FIELD_PREP(MTK_WED_TX_BM_TKID_START,
66 - dev->wlan.token_start) |
67 - FIELD_PREP(MTK_WED_TX_BM_TKID_END,
68 - dev->wlan.token_start +
69 - dev->wlan.nbuf - 1));
70 wed_w32(dev, MTK_WED_TX_BM_DYN_THR,
71 FIELD_PREP(MTK_WED_TX_BM_DYN_THR_LO_V2, 0) |
72 MTK_WED_TX_BM_DYN_THR_HI_V2);
73 @@ -971,6 +979,11 @@ mtk_wed_hw_init(struct mtk_wed_device *d
74 MTK_WED_TX_TKID_DYN_THR_HI);
75 }
76
77 + wed_w32(dev, dev->hw->soc->regmap.tx_bm_tkid,
78 + FIELD_PREP(MTK_WED_TX_BM_TKID_START, dev->wlan.token_start) |
79 + FIELD_PREP(MTK_WED_TX_BM_TKID_END,
80 + dev->wlan.token_start + dev->wlan.nbuf - 1));
81 +
82 mtk_wed_reset(dev, MTK_WED_RESET_TX_BM);
83
84 if (mtk_wed_is_v1(dev->hw)) {
85 @@ -1105,13 +1118,8 @@ mtk_wed_rx_reset(struct mtk_wed_device *
86 if (ret) {
87 mtk_wed_reset(dev, MTK_WED_RESET_WED_RX_DMA);
88 } else {
89 - struct mtk_eth *eth = dev->hw->eth;
90 -
91 - if (mtk_is_netsys_v2_or_greater(eth))
92 - wed_set(dev, MTK_WED_RESET_IDX,
93 - MTK_WED_RESET_IDX_RX_V2);
94 - else
95 - wed_set(dev, MTK_WED_RESET_IDX, MTK_WED_RESET_IDX_RX);
96 + wed_set(dev, MTK_WED_RESET_IDX,
97 + dev->hw->soc->regmap.reset_idx_rx_mask);
98 wed_w32(dev, MTK_WED_RESET_IDX, 0);
99 }
100
101 @@ -1164,7 +1172,8 @@ mtk_wed_reset_dma(struct mtk_wed_device
102 if (busy) {
103 mtk_wed_reset(dev, MTK_WED_RESET_WED_TX_DMA);
104 } else {
105 - wed_w32(dev, MTK_WED_RESET_IDX, MTK_WED_RESET_IDX_TX);
106 + wed_w32(dev, MTK_WED_RESET_IDX,
107 + dev->hw->soc->regmap.reset_idx_tx_mask);
108 wed_w32(dev, MTK_WED_RESET_IDX, 0);
109 }
110
111 @@ -1256,7 +1265,6 @@ static int
112 mtk_wed_wdma_rx_ring_setup(struct mtk_wed_device *dev, int idx, int size,
113 bool reset)
114 {
115 - u32 desc_size = sizeof(struct mtk_wdma_desc) * dev->hw->version;
116 struct mtk_wed_ring *wdma;
117
118 if (idx >= ARRAY_SIZE(dev->rx_wdma))
119 @@ -1264,7 +1272,7 @@ mtk_wed_wdma_rx_ring_setup(struct mtk_we
120
121 wdma = &dev->rx_wdma[idx];
122 if (!reset && mtk_wed_ring_alloc(dev, wdma, MTK_WED_WDMA_RING_SIZE,
123 - desc_size, true))
124 + dev->hw->soc->wdma_desc_size, true))
125 return -ENOMEM;
126
127 wdma_w32(dev, MTK_WDMA_RING_RX(idx) + MTK_WED_RING_OFS_BASE,
128 @@ -1285,7 +1293,6 @@ static int
129 mtk_wed_wdma_tx_ring_setup(struct mtk_wed_device *dev, int idx, int size,
130 bool reset)
131 {
132 - u32 desc_size = sizeof(struct mtk_wdma_desc) * dev->hw->version;
133 struct mtk_wed_ring *wdma;
134
135 if (idx >= ARRAY_SIZE(dev->tx_wdma))
136 @@ -1293,7 +1300,7 @@ mtk_wed_wdma_tx_ring_setup(struct mtk_we
137
138 wdma = &dev->tx_wdma[idx];
139 if (!reset && mtk_wed_ring_alloc(dev, wdma, MTK_WED_WDMA_RING_SIZE,
140 - desc_size, true))
141 + dev->hw->soc->wdma_desc_size, true))
142 return -ENOMEM;
143
144 wdma_w32(dev, MTK_WDMA_RING_TX(idx) + MTK_WED_RING_OFS_BASE,
145 @@ -1932,7 +1939,12 @@ void mtk_wed_add_hw(struct device_node *
146 hw->irq = irq;
147 hw->version = eth->soc->version;
148
149 - if (mtk_wed_is_v1(hw)) {
150 + switch (hw->version) {
151 + case 2:
152 + hw->soc = &mt7986_data;
153 + break;
154 + default:
155 + case 1:
156 hw->mirror = syscon_regmap_lookup_by_phandle(eth_np,
157 "mediatek,pcie-mirror");
158 hw->hifsys = syscon_regmap_lookup_by_phandle(eth_np,
159 @@ -1946,6 +1958,8 @@ void mtk_wed_add_hw(struct device_node *
160 regmap_write(hw->mirror, 0, 0);
161 regmap_write(hw->mirror, 4, 0);
162 }
163 + hw->soc = &mt7622_data;
164 + break;
165 }
166
167 mtk_wed_hw_add_debugfs(hw);
168 --- a/drivers/net/ethernet/mediatek/mtk_wed.h
169 +++ b/drivers/net/ethernet/mediatek/mtk_wed.h
170 @@ -12,7 +12,18 @@
171 struct mtk_eth;
172 struct mtk_wed_wo;
173
174 +struct mtk_wed_soc_data {
175 + struct {
176 + u32 tx_bm_tkid;
177 + u32 wpdma_rx_ring0;
178 + u32 reset_idx_tx_mask;
179 + u32 reset_idx_rx_mask;
180 + } regmap;
181 + u32 wdma_desc_size;
182 +};
183 +
184 struct mtk_wed_hw {
185 + const struct mtk_wed_soc_data *soc;
186 struct device_node *node;
187 struct mtk_eth *eth;
188 struct regmap *regs;
189 --- a/drivers/net/ethernet/mediatek/mtk_wed_regs.h
190 +++ b/drivers/net/ethernet/mediatek/mtk_wed_regs.h
191 @@ -100,8 +100,6 @@ struct mtk_wdma_desc {
192
193 #define MTK_WED_TX_BM_BASE 0x084
194
195 -#define MTK_WED_TX_BM_TKID 0x088
196 -#define MTK_WED_TX_BM_TKID_V2 0x0c8
197 #define MTK_WED_TX_BM_TKID_START GENMASK(15, 0)
198 #define MTK_WED_TX_BM_TKID_END GENMASK(31, 16)
199
200 @@ -160,9 +158,6 @@ struct mtk_wdma_desc {
201 #define MTK_WED_GLO_CFG_RX_2B_OFFSET BIT(31)
202
203 #define MTK_WED_RESET_IDX 0x20c
204 -#define MTK_WED_RESET_IDX_TX GENMASK(3, 0)
205 -#define MTK_WED_RESET_IDX_RX GENMASK(17, 16)
206 -#define MTK_WED_RESET_IDX_RX_V2 GENMASK(7, 6)
207 #define MTK_WED_RESET_WPDMA_IDX_RX GENMASK(31, 30)
208
209 #define MTK_WED_TX_MIB(_n) (0x2a0 + (_n) * 4)
210 @@ -286,7 +281,6 @@ struct mtk_wdma_desc {
211 #define MTK_WED_WPDMA_RX_D_RST_DRV_IDX GENMASK(25, 24)
212
213 #define MTK_WED_WPDMA_RX_GLO_CFG 0x76c
214 -#define MTK_WED_WPDMA_RX_RING 0x770
215
216 #define MTK_WED_WPDMA_RX_D_MIB(_n) (0x774 + (_n) * 4)
217 #define MTK_WED_WPDMA_RX_D_PROCESSED_MIB(_n) (0x784 + (_n) * 4)
Staging tree of Linus Walleij