git.openwrt.org Git - openwrt/staging/ldir.git/blob

   1 From f6658c1c4ae98477d6be00495226c0617354fe76 Mon Sep 17 00:00:00 2001
   2 From: Markus Schneider-Pargmann <msp@baylibre.com>
   3 Date: Fri, 27 Jan 2023 16:44:43 +0100
   4 Subject: [PATCH 11/42] thermal/drivers/mediatek: Control buffer enablement
   5  tweaks
   6
   7 Add logic in order to be able to turn on the control buffer on MT8365.
   8 This change now allows to have control buffer support for MTK_THERMAL_V1,
   9 and it allows to define the register offset, and mask used to enable it.
  10
  11 Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
  12 Signed-off-by: Fabien Parent <fparent@baylibre.com>
  13 Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
  14 Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
  15 Link: https://lore.kernel.org/r/20221018-up-i350-thermal-bringup-v9-2-55a1ae14af74@baylibre.com
  16 Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
  17 ---
  18  drivers/thermal/mediatek/auxadc_thermal.c | 28 +++++++++++++++--------
  19  1 file changed, 19 insertions(+), 9 deletions(-)
  20
  21 --- a/drivers/thermal/mediatek/auxadc_thermal.c
  22 +++ b/drivers/thermal/mediatek/auxadc_thermal.c
  23 @@ -307,6 +307,9 @@ struct mtk_thermal_data {
  24         bool need_switch_bank;
  25         struct thermal_bank_cfg bank_data[MAX_NUM_ZONES];
  26         enum mtk_thermal_version version;
  27 +       u32 apmixed_buffer_ctl_reg;
  28 +       u32 apmixed_buffer_ctl_mask;
  29 +       u32 apmixed_buffer_ctl_set;
  30  };
  31
  32  struct mtk_thermal {
  33 @@ -560,6 +563,9 @@ static const struct mtk_thermal_data mt7
  34         .adcpnp = mt7622_adcpnp,
  35         .sensor_mux_values = mt7622_mux_values,
  36         .version = MTK_THERMAL_V2,
  37 +       .apmixed_buffer_ctl_reg = APMIXED_SYS_TS_CON1,
  38 +       .apmixed_buffer_ctl_mask = GENMASK(31, 6) | BIT(3),
  39 +       .apmixed_buffer_ctl_set = BIT(0),
  40  };
  41
  42  /*
  43 @@ -1079,14 +1085,18 @@ static const struct of_device_id mtk_the
  44  };
  45  MODULE_DEVICE_TABLE(of, mtk_thermal_of_match);
  46
  47 -static void mtk_thermal_turn_on_buffer(void __iomem *apmixed_base)
  48 +static void mtk_thermal_turn_on_buffer(struct mtk_thermal *mt,
  49 +                                      void __iomem *apmixed_base)
  50  {
  51 -       int tmp;
  52 +       u32 tmp;
  53 +
  54 +       if (!mt->conf->apmixed_buffer_ctl_reg)
  55 +               return;
  56
  57 -       tmp = readl(apmixed_base + APMIXED_SYS_TS_CON1);
  58 -       tmp &= ~(0x37);
  59 -       tmp |= 0x1;
  60 -       writel(tmp, apmixed_base + APMIXED_SYS_TS_CON1);
  61 +       tmp = readl(apmixed_base + mt->conf->apmixed_buffer_ctl_reg);
  62 +       tmp &= mt->conf->apmixed_buffer_ctl_mask;
  63 +       tmp |= mt->conf->apmixed_buffer_ctl_set;
  64 +       writel(tmp, apmixed_base + mt->conf->apmixed_buffer_ctl_reg);
  65         udelay(200);
  66  }
  67
  68 @@ -1184,10 +1194,10 @@ static int mtk_thermal_probe(struct plat
  69                 goto err_disable_clk_auxadc;
  70         }
  71
  72 -       if (mt->conf->version != MTK_THERMAL_V1) {
  73 -               mtk_thermal_turn_on_buffer(apmixed_base);
  74 +       mtk_thermal_turn_on_buffer(mt, apmixed_base);
  75 +
  76 +       if (mt->conf->version != MTK_THERMAL_V2)
  77                 mtk_thermal_release_periodic_ts(mt, auxadc_base);
  78 -       }
  79
  80         if (mt->conf->version == MTK_THERMAL_V1)
  81                 mt->raw_to_mcelsius = raw_to_mcelsius_v1;