611f96b1a8df5ba14c6a604a6f70976d24dd9479
[openwrt/staging/linusw.git] /
1 From 83d2cb1c64c5a34f23b34fcee715a68be230c232 Mon Sep 17 00:00:00 2001
2 From: Peng Ma <peng.ma@nxp.com>
3 Date: Thu, 12 Dec 2019 03:38:10 +0000
4 Subject: [PATCH] dmaengine: fsl-edma: Add eDMA support for QorIQ LS1028A
5 platform
6
7 Our platforms(such as LS1021A, LS1012A, LS1043A, LS1046A, LS1028A) with
8 below registers(CHCFG0 - CHCFG15) of eDMA as follows:
9 *-----------------------------------------------------------*
10 | Offset | OTHERS | LS1028A |
11 |--------------|--------------------|-----------------------|
12 | 0x0 | CHCFG0 | CHCFG3 |
13 |--------------|--------------------|-----------------------|
14 | 0x1 | CHCFG1 | CHCFG2 |
15 |--------------|--------------------|-----------------------|
16 | 0x2 | CHCFG2 | CHCFG1 |
17 |--------------|--------------------|-----------------------|
18 | 0x3 | CHCFG3 | CHCFG0 |
19 |--------------|--------------------|-----------------------|
20 | ... | ...... | ...... |
21 |--------------|--------------------|-----------------------|
22 | 0xC | CHCFG12 | CHCFG15 |
23 |--------------|--------------------|-----------------------|
24 | 0xD | CHCFG13 | CHCFG14 |
25 |--------------|--------------------|-----------------------|
26 | 0xE | CHCFG14 | CHCFG13 |
27 |--------------|--------------------|-----------------------|
28 | 0xF | CHCFG15 | CHCFG12 |
29 *-----------------------------------------------------------*
30
31 This patch is to improve edma driver to fit LS1028A platform.
32
33 Signed-off-by: Peng Ma <peng.ma@nxp.com>
34 Reviewed-by: Robin Gong <yibin.gong@nxp.com>
35 Link: https://lore.kernel.org/r/20191212033714.4090-1-peng.ma@nxp.com
36 Signed-off-by: Vinod Koul <vkoul@kernel.org>
37 ---
38 drivers/dma/fsl-edma-common.c | 5 +++++
39 drivers/dma/fsl-edma-common.h | 1 +
40 drivers/dma/fsl-edma.c | 8 ++++++++
41 3 files changed, 14 insertions(+)
42
43 --- a/drivers/dma/fsl-edma-common.c
44 +++ b/drivers/dma/fsl-edma-common.c
45 @@ -109,10 +109,15 @@ void fsl_edma_chan_mux(struct fsl_edma_c
46 u32 ch = fsl_chan->vchan.chan.chan_id;
47 void __iomem *muxaddr;
48 unsigned int chans_per_mux, ch_off;
49 + int endian_diff[4] = {3, 1, -1, -3};
50 u32 dmamux_nr = fsl_chan->edma->drvdata->dmamuxs;
51
52 chans_per_mux = fsl_chan->edma->n_chans / dmamux_nr;
53 ch_off = fsl_chan->vchan.chan.chan_id % chans_per_mux;
54 +
55 + if (fsl_chan->edma->drvdata->mux_swap)
56 + ch_off += endian_diff[ch_off % 4];
57 +
58 muxaddr = fsl_chan->edma->muxbase[ch / chans_per_mux];
59 slot = EDMAMUX_CHCFG_SOURCE(slot);
60
61 --- a/drivers/dma/fsl-edma-common.h
62 +++ b/drivers/dma/fsl-edma-common.h
63 @@ -148,6 +148,7 @@ struct fsl_edma_drvdata {
64 enum edma_version version;
65 u32 dmamuxs;
66 bool has_dmaclk;
67 + bool mux_swap;
68 int (*setup_irq)(struct platform_device *pdev,
69 struct fsl_edma_engine *fsl_edma);
70 };
71 --- a/drivers/dma/fsl-edma.c
72 +++ b/drivers/dma/fsl-edma.c
73 @@ -234,6 +234,13 @@ static struct fsl_edma_drvdata vf610_dat
74 .setup_irq = fsl_edma_irq_init,
75 };
76
77 +static struct fsl_edma_drvdata ls1028a_data = {
78 + .version = v1,
79 + .dmamuxs = DMAMUX_NR,
80 + .mux_swap = true,
81 + .setup_irq = fsl_edma_irq_init,
82 +};
83 +
84 static struct fsl_edma_drvdata imx7ulp_data = {
85 .version = v3,
86 .dmamuxs = 1,
87 @@ -243,6 +250,7 @@ static struct fsl_edma_drvdata imx7ulp_d
88
89 static const struct of_device_id fsl_edma_dt_ids[] = {
90 { .compatible = "fsl,vf610-edma", .data = &vf610_data},
91 + { .compatible = "fsl,ls1028a-edma", .data = &ls1028a_data},
92 { .compatible = "fsl,imx7ulp-edma", .data = &imx7ulp_data},
93 { /* sentinel */ }
94 };