git.openwrt.org Git - openwrt/staging/ynezz.git/blob

   1 From beadd8dfb16c626c2261fc6f8aab935cd7412603 Mon Sep 17 00:00:00 2001
   2 From: Maxime Ripard <maxime@cerno.tech>
   3 Date: Mon, 11 Jan 2021 15:23:01 +0100
   4 Subject: [PATCH] drm/vc4: hdmi: Update the CEC clock divider on HSM
   5  rate change
   6
   7 As part of the enable sequence we might change the HSM clock rate if the
   8 pixel rate is different than the one we were already dealing with.
   9
  10 On the BCM2835 however, the CEC clock derives from the HSM clock so any
  11 rate change will need to be reflected in the CEC clock divider to output
  12 40kHz.
  13
  14 Fixes: cd4cb49dc5bb ("drm/vc4: hdmi: Adjust HSM clock rate depending on pixel rate")
  15 Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
  16 Signed-off-by: Maxime Ripard <maxime@cerno.tech>
  17 ---
  18  drivers/gpu/drm/vc4/vc4_hdmi.c | 2 ++
  19  1 file changed, 2 insertions(+)
  20
  21 --- a/drivers/gpu/drm/vc4/vc4_hdmi.c
  22 +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
  23 @@ -802,6 +802,8 @@ static void vc4_hdmi_encoder_pre_crtc_co
  24
  25         vc4_hdmi_cec_update_clk_div(vc4_hdmi);
  26
  27 +       vc4_hdmi_cec_update_clk_div(vc4_hdmi);
  28 +
  29         /*
  30          * FIXME: When the pixel freq is 594MHz (4k60), this needs to be setup
  31          * at 300MHz.