git.openwrt.org Git - openwrt/staging/xback.git/blob

   1 From b4a544e415e9be33b37d9bfa9d9f9f4d13f553d6 Mon Sep 17 00:00:00 2001
   2 From: William Zhang <william.zhang@broadcom.com>
   3 Date: Fri, 8 Jul 2022 11:25:06 -0700
   4 Subject: [PATCH] arm64: dts: broadcom: bcm4908: Fix timer node for BCM4906 SoC
   5
   6 The cpu mask value in interrupt property inherits from bcm4908.dtsi
   7 which sets to four cpus. Correct the value to two cpus for dual core
   8 BCM4906 SoC.
   9
  10 Fixes: c8b404fb05dc ("arm64: dts: broadcom: bcm4908: add BCM4906 Netgear R8000P DTS files")
  11 Signed-off-by: William Zhang <william.zhang@broadcom.com>
  12 Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
  13 ---
  14  arch/arm64/boot/dts/broadcom/bcm4908/bcm4906.dtsi | 8 ++++++++
  15  1 file changed, 8 insertions(+)
  16
  17 --- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906.dtsi
  18 +++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906.dtsi
  19 @@ -17,6 +17,14 @@
  20                              <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
  21         };
  22
  23 +       timer {
  24 +               compatible = "arm,armv8-timer";
  25 +               interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
  26 +                            <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
  27 +                            <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
  28 +                            <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
  29 +       };
  30 +
  31         pmu {
  32                 compatible = "arm,cortex-a53-pmu";
  33                 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,