git.openwrt.org Git - openwrt/staging/linusw.git/blob

   1 From 7e2f6cb11c24799b6851142c4a5ce69bdc630364 Mon Sep 17 00:00:00 2001
   2 From: =?UTF-8?q?Duke=20Xin=20=28=E8=BE=9B=E5=AE=89=E6=96=87=29?=
   3  <duke_xinanwen@163.com>
   4 Date: Thu, 29 Jun 2023 23:23:18 -0700
   5 Subject: [PATCH 08/13] bus: mhi: host: pci_generic: Add support for Quectel
   6  RM520N-GL modem
   7 MIME-Version: 1.0
   8 Content-Type: text/plain; charset=UTF-8
   9 Content-Transfer-Encoding: 8bit
  10
  11 Add MHI interface definition for RM520 product based on Qualcomm SDX6X chip
  12
  13 Signed-off-by: Duke Xin(辛安文) <duke_xinanwen@163.com>
  14 Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
  15 Link: https://lore.kernel.org/r/20230630062318.12114-1-duke_xinanwen@163.com
  16 Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
  17 ---
  18  drivers/bus/mhi/host/pci_generic.c | 13 +++++++++++++
  19  1 file changed, 13 insertions(+)
  20
  21 --- a/drivers/bus/mhi/host/pci_generic.c
  22 +++ b/drivers/bus/mhi/host/pci_generic.c
  23 @@ -352,6 +352,16 @@ static const struct mhi_pci_dev_info mhi
  24         .sideband_wake = true,
  25  };
  26
  27 +static const struct mhi_pci_dev_info mhi_quectel_rm5xx_info = {
  28 +       .name = "quectel-rm5xx",
  29 +       .edl = "qcom/prog_firehose_sdx6x.elf",
  30 +       .config = &modem_quectel_em1xx_config,
  31 +       .bar_num = MHI_PCI_DEFAULT_BAR_NUM,
  32 +       .dma_data_width = 32,
  33 +       .mru_default = 32768,
  34 +       .sideband_wake = true,
  35 +};
  36 +
  37  static const struct mhi_channel_config mhi_foxconn_sdx55_channels[] = {
  38         MHI_CHANNEL_CONFIG_UL(0, "LOOPBACK", 32, 0),
  39         MHI_CHANNEL_CONFIG_DL(1, "LOOPBACK", 32, 0),
  40 @@ -591,6 +601,9 @@ static const struct pci_device_id mhi_pc
  41                 .driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info },
  42         { PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x1002), /* EM160R-GL (sdx24) */
  43                 .driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info },
  44 +       /* RM520N-GL (sdx6x), eSIM */
  45 +       { PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x1004),
  46 +               .driver_data = (kernel_ulong_t) &mhi_quectel_rm5xx_info },
  47         { PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x100d), /* EM160R-GL (sdx24) */
  48                 .driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info },
  49         { PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x2001), /* EM120R-GL for FCCL (sdx24) */