1 From e7a9cc3cc00b40e0bc2bae40bd2ece0e48fa51d5 Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com>
3 Date: Mon, 22 Apr 2024 10:15:22 +0300
4 Subject: [PATCH 15/15] net: dsa: mt7530: explain exposing MDIO bus of MT7531AE
7 Content-Type: text/plain; charset=UTF-8
8 Content-Transfer-Encoding: 8bit
10 Unlike MT7531BE, the GPIO 6-12 pins are not used for RGMII on MT7531AE.
11 Therefore, the GPIO 11-12 pins are set to function as MDC and MDIO to
12 expose the MDIO bus of the switch. Replace the comment with a better
15 Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
17 drivers/net/dsa/mt7530.c | 5 ++++-
18 1 file changed, 4 insertions(+), 1 deletion(-)
20 --- a/drivers/net/dsa/mt7530.c
21 +++ b/drivers/net/dsa/mt7530.c
22 @@ -2635,7 +2635,10 @@ mt7531_setup(struct dsa_switch *ds)
23 if (!priv->p5_sgmii) {
24 mt7531_pll_setup(priv);
26 - /* Let ds->slave_mii_bus be able to access external phy. */
27 + /* Unlike MT7531BE, the GPIO 6-12 pins are not used for RGMII on
28 + * MT7531AE. Set the GPIO 11-12 pins to function as MDC and MDIO
29 + * to expose the MDIO bus of the switch.
31 mt7530_rmw(priv, MT7531_GPIO_MODE1, MT7531_GPIO11_RG_RXD2_MASK,
33 mt7530_rmw(priv, MT7531_GPIO_MODE1, MT7531_GPIO12_RG_RXD3_MASK,