git.openwrt.org Git - openwrt/staging/rmilecki.git/blob

   1 From 4f86eb098e18fd0f032877dfa1a7e8c1503ca409 Mon Sep 17 00:00:00 2001
   2 From: =?UTF-8?q?Alexis=20Lothor=C3=A9?= <alexis.lothore@bootlin.com>
   3 Date: Mon, 29 May 2023 10:02:41 +0200
   4 Subject: [PATCH 1/6] net: dsa: mv88e6xxx: pass directly chip structure to
   5  mv88e6xxx_phy_is_internal
   6 MIME-Version: 1.0
   7 Content-Type: text/plain; charset=UTF-8
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   9
  10 Since this function is a simple helper, we do not need to pass a full
  11 dsa_switch structure, we can directly pass the mv88e6xxx_chip structure.
  12 Doing so will allow to share this function with any other function
  13 not manipulating dsa_switch structure but needing info about number of
  14 internal phys
  15
  16 Signed-off-by: Alexis Lothoré <alexis.lothore@bootlin.com>
  17 Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
  18 Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
  19 Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  20 ---
  21  drivers/net/dsa/mv88e6xxx/chip.c | 10 ++++------
  22  1 file changed, 4 insertions(+), 6 deletions(-)
  23
  24 --- a/drivers/net/dsa/mv88e6xxx/chip.c
  25 +++ b/drivers/net/dsa/mv88e6xxx/chip.c
  26 @@ -470,10 +470,8 @@ restore_link:
  27         return err;
  28  }
  29
  30 -static int mv88e6xxx_phy_is_internal(struct dsa_switch *ds, int port)
  31 +static int mv88e6xxx_phy_is_internal(struct mv88e6xxx_chip *chip, int port)
  32  {
  33 -       struct mv88e6xxx_chip *chip = ds->priv;
  34 -
  35         return port < chip->info->num_internal_phys;
  36  }
  37
  38 @@ -591,7 +589,7 @@ static void mv88e6095_phylink_get_caps(s
  39
  40         config->mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100;
  41
  42 -       if (mv88e6xxx_phy_is_internal(chip->ds, port)) {
  43 +       if (mv88e6xxx_phy_is_internal(chip, port)) {
  44                 __set_bit(PHY_INTERFACE_MODE_MII, config->supported_interfaces);
  45         } else {
  46                 if (cmode < ARRAY_SIZE(mv88e6185_phy_interface_modes) &&
  47 @@ -839,7 +837,7 @@ static void mv88e6xxx_get_caps(struct ds
  48         chip->info->ops->phylink_get_caps(chip, port, config);
  49         mv88e6xxx_reg_unlock(chip);
  50
  51 -       if (mv88e6xxx_phy_is_internal(ds, port)) {
  52 +       if (mv88e6xxx_phy_is_internal(chip, port)) {
  53                 __set_bit(PHY_INTERFACE_MODE_INTERNAL,
  54                           config->supported_interfaces);
  55                 /* Internal ports with no phy-mode need GMII for PHYLIB */
  56 @@ -860,7 +858,7 @@ static void mv88e6xxx_mac_config(struct
  57
  58         mv88e6xxx_reg_lock(chip);
  59
  60 -       if (mode != MLO_AN_PHY || !mv88e6xxx_phy_is_internal(ds, port)) {
  61 +       if (mode != MLO_AN_PHY || !mv88e6xxx_phy_is_internal(chip, port)) {
  62                 /* In inband mode, the link may come up at any time while the
  63                  * link is not forced down. Force the link down while we
  64                  * reconfigure the interface mode.