git.openwrt.org Git - openwrt/staging/ansuel.git/blob

   1 From 8ca5e0e4d6ed084d2321584e8cdc8105c60b9aa1 Mon Sep 17 00:00:00 2001
   2 From: FUKAUMI Naoki <naoki@radxa.com>
   3 Date: Tue, 25 Jun 2024 05:45:29 +0900
   4 Subject: [PATCH] rockchip: add support for Radxa ROCK Pi E v3.0
   5
   6 ROCK Pi E v3.0 uses DDR4 SDRAM instead of DDR3 SDRAM used in v1.2x.
   7
   8 prepare new rk3328-rock-pi-e-v3.dts in u-boot which just includes
   9 upstream rk3328-rock-pi-e.dts.
  10
  11 defconfig still uses
  12  CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-rock-pi-e.dtb"
  13
  14 because v3.0 and prior are compatible.
  15
  16 Suggested-by: Jonas Karlman <jonas@kwiboo.se>
  17 Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
  18 Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
  19 ---
  20  ...dtsi => rk3328-rock-pi-e-base-u-boot.dtsi} |  1 -
  21  arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi     | 47 +--------
  22  arch/arm/dts/rk3328-rock-pi-e-v3-u-boot.dtsi  |  4 +
  23  arch/arm/dts/rk3328-rock-pi-e-v3.dts          |  4 +
  24  board/rockchip/evb_rk3328/MAINTAINERS         |  4 +-
  25  configs/rock-pi-e-v3-rk3328_defconfig         | 97 +++++++++++++++++++
  26  6 files changed, 111 insertions(+), 46 deletions(-)
  27  copy arch/arm/dts/{rk3328-rock-pi-e-u-boot.dtsi => rk3328-rock-pi-e-base-u-boot.dtsi} (94%)
  28  rewrite arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi (88%)
  29  create mode 100644 arch/arm/dts/rk3328-rock-pi-e-v3-u-boot.dtsi
  30  create mode 100644 arch/arm/dts/rk3328-rock-pi-e-v3.dts
  31  create mode 100644 configs/rock-pi-e-v3-rk3328_defconfig
  32
  33 --- a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
  34 +++ b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
  35 @@ -1,43 +1,4 @@
  36  // SPDX-License-Identifier: GPL-2.0+
  37 -/*
  38 - * (C) Copyright 2020 Radxa
  39 - */
  40
  41 -#include "rk3328-u-boot.dtsi"
  42 +#include "rk3328-rock-pi-e-base-u-boot.dtsi"
  43  #include "rk3328-sdram-ddr3-666.dtsi"
  44 -
  45 -/ {
  46 -       smbios {
  47 -               compatible = "u-boot,sysinfo-smbios";
  48 -
  49 -               smbios {
  50 -                       system {
  51 -                               manufacturer = "radxa";
  52 -                               product = "rock-pi-e_rk3328";
  53 -                       };
  54 -
  55 -                       baseboard {
  56 -                               manufacturer = "radxa";
  57 -                               product = "rock-pi-e_rk3328";
  58 -                       };
  59 -
  60 -                       chassis {
  61 -                               manufacturer = "radxa";
  62 -                               product = "rock-pi-e_rk3328";
  63 -                       };
  64 -               };
  65 -       };
  66 -};
  67 -
  68 -&u2phy_host {
  69 -       phy-supply = <&vcc_host_5v>;
  70 -};
  71 -
  72 -&vcc_host_5v {
  73 -       /delete-property/ regulator-always-on;
  74 -       /delete-property/ regulator-boot-on;
  75 -};
  76 -
  77 -&vcc_sd {
  78 -       bootph-pre-ram;
  79 -};
  80 --- /dev/null
  81 +++ b/arch/arm/dts/rk3328-rock-pi-e-base-u-boot.dtsi
  82 @@ -0,0 +1,42 @@
  83 +// SPDX-License-Identifier: GPL-2.0+
  84 +/*
  85 + * (C) Copyright 2020 Radxa
  86 + */
  87 +
  88 +#include "rk3328-u-boot.dtsi"
  89 +
  90 +/ {
  91 +       smbios {
  92 +               compatible = "u-boot,sysinfo-smbios";
  93 +
  94 +               smbios {
  95 +                       system {
  96 +                               manufacturer = "radxa";
  97 +                               product = "rock-pi-e_rk3328";
  98 +                       };
  99 +
 100 +                       baseboard {
 101 +                               manufacturer = "radxa";
 102 +                               product = "rock-pi-e_rk3328";
 103 +                       };
 104 +
 105 +                       chassis {
 106 +                               manufacturer = "radxa";
 107 +                               product = "rock-pi-e_rk3328";
 108 +                       };
 109 +               };
 110 +       };
 111 +};
 112 +
 113 +&u2phy_host {
 114 +       phy-supply = <&vcc_host_5v>;
 115 +};
 116 +
 117 +&vcc_host_5v {
 118 +       /delete-property/ regulator-always-on;
 119 +       /delete-property/ regulator-boot-on;
 120 +};
 121 +
 122 +&vcc_sd {
 123 +       bootph-pre-ram;
 124 +};
 125 --- /dev/null
 126 +++ b/arch/arm/dts/rk3328-rock-pi-e-v3-u-boot.dtsi
 127 @@ -0,0 +1,4 @@
 128 +// SPDX-License-Identifier: GPL-2.0+
 129 +
 130 +#include "rk3328-rock-pi-e-base-u-boot.dtsi"
 131 +#include "rk3328-sdram-ddr4-666.dtsi"
 132 --- /dev/null
 133 +++ b/arch/arm/dts/rk3328-rock-pi-e-v3.dts
 134 @@ -0,0 +1,4 @@
 135 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 136 +
 137 +/dts-v1/;
 138 +#include "rk3328-rock-pi-e.dts"
 139 --- a/board/rockchip/evb_rk3328/MAINTAINERS
 140 +++ b/board/rockchip/evb_rk3328/MAINTAINERS
 141 @@ -64,5 +64,5 @@ M:      Banglang Huang <banglang.huang@f
 142  R:      Jonas Karlman <jonas@kwiboo.se>
 143  S:      Maintained
 144  F:      configs/rock-pi-e-rk3328_defconfig
 145 -F:      arch/arm/dts/rk3328-rock-pi-e.dts
 146 -F:      arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
 147 +F:      configs/rock-pi-e-v3-rk3328_defconfig
 148 +F:      arch/arm/dts/rk3328-rock-pi-e*
 149 --- /dev/null
 150 +++ b/configs/rock-pi-e-v3-rk3328_defconfig
 151 @@ -0,0 +1,97 @@
 152 +CONFIG_ARM=y
 153 +CONFIG_SKIP_LOWLEVEL_INIT=y
 154 +CONFIG_COUNTER_FREQUENCY=24000000
 155 +CONFIG_ARCH_ROCKCHIP=y
 156 +CONFIG_SPL_GPIO=y
 157 +CONFIG_NR_DRAM_BANKS=1
 158 +CONFIG_SF_DEFAULT_SPEED=20000000
 159 +CONFIG_ENV_OFFSET=0x3F8000
 160 +CONFIG_DEFAULT_DEVICE_TREE="rk3328-rock-pi-e-v3"
 161 +CONFIG_DM_RESET=y
 162 +CONFIG_ROCKCHIP_RK3328=y
 163 +CONFIG_DEBUG_UART_BASE=0xFF130000
 164 +CONFIG_DEBUG_UART_CLOCK=24000000
 165 +CONFIG_SYS_LOAD_ADDR=0x800800
 166 +CONFIG_DEBUG_UART=y
 167 +CONFIG_FIT=y
 168 +CONFIG_FIT_VERBOSE=y
 169 +CONFIG_SPL_FIT_SIGNATURE=y
 170 +CONFIG_SPL_LOAD_FIT=y
 171 +CONFIG_LEGACY_IMAGE_FORMAT=y
 172 +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-rock-pi-e.dtb"
 173 +# CONFIG_DISPLAY_CPUINFO is not set
 174 +CONFIG_DISPLAY_BOARDINFO_LATE=y
 175 +CONFIG_SPL_MAX_SIZE=0x40000
 176 +CONFIG_SPL_PAD_TO=0x7f8000
 177 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 178 +CONFIG_SPL_POWER=y
 179 +CONFIG_SPL_ATF=y
 180 +CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 181 +CONFIG_CMD_BOOTZ=y
 182 +CONFIG_CMD_GPIO=y
 183 +CONFIG_CMD_GPT=y
 184 +CONFIG_CMD_MMC=y
 185 +CONFIG_CMD_USB=y
 186 +CONFIG_CMD_TIME=y
 187 +CONFIG_CMD_REGULATOR=y
 188 +CONFIG_SPL_OF_CONTROL=y
 189 +CONFIG_TPL_OF_CONTROL=y
 190 +# CONFIG_OF_UPSTREAM is not set
 191 +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 192 +CONFIG_TPL_OF_PLATDATA=y
 193 +CONFIG_ENV_IS_IN_MMC=y
 194 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 195 +CONFIG_SYS_MMC_ENV_DEV=1
 196 +CONFIG_TPL_DM=y
 197 +CONFIG_SPL_DM_SEQ_ALIAS=y
 198 +CONFIG_REGMAP=y
 199 +CONFIG_SPL_REGMAP=y
 200 +CONFIG_TPL_REGMAP=y
 201 +CONFIG_SYSCON=y
 202 +CONFIG_SPL_SYSCON=y
 203 +CONFIG_TPL_SYSCON=y
 204 +CONFIG_CLK=y
 205 +CONFIG_SPL_CLK=y
 206 +CONFIG_ROCKCHIP_GPIO=y
 207 +CONFIG_SYS_I2C_ROCKCHIP=y
 208 +CONFIG_MMC_DW=y
 209 +CONFIG_MMC_DW_ROCKCHIP=y
 210 +CONFIG_PHY_REALTEK=y
 211 +CONFIG_DM_MDIO=y
 212 +CONFIG_DM_ETH_PHY=y
 213 +CONFIG_PHY_GIGE=y
 214 +CONFIG_ETH_DESIGNWARE=y
 215 +CONFIG_GMAC_ROCKCHIP=y
 216 +CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 217 +CONFIG_PINCTRL=y
 218 +CONFIG_SPL_PINCTRL=y
 219 +CONFIG_DM_PMIC=y
 220 +CONFIG_PMIC_RK8XX=y
 221 +CONFIG_SPL_DM_REGULATOR=y
 222 +CONFIG_DM_REGULATOR_FIXED=y
 223 +CONFIG_SPL_DM_REGULATOR_FIXED=y
 224 +CONFIG_REGULATOR_RK8XX=y
 225 +CONFIG_PWM_ROCKCHIP=y
 226 +CONFIG_RAM=y
 227 +CONFIG_SPL_RAM=y
 228 +CONFIG_TPL_RAM=y
 229 +CONFIG_DM_RNG=y
 230 +CONFIG_RNG_ROCKCHIP=y
 231 +CONFIG_BAUDRATE=1500000
 232 +CONFIG_DEBUG_UART_SHIFT=2
 233 +CONFIG_SYS_NS16550_MEM32=y
 234 +CONFIG_SYSINFO=y
 235 +CONFIG_SYSINFO_SMBIOS=y
 236 +CONFIG_SYSRESET=y
 237 +# CONFIG_TPL_SYSRESET is not set
 238 +CONFIG_USB=y
 239 +CONFIG_USB_XHCI_HCD=y
 240 +CONFIG_USB_EHCI_HCD=y
 241 +CONFIG_USB_EHCI_GENERIC=y
 242 +CONFIG_USB_OHCI_HCD=y
 243 +CONFIG_USB_OHCI_GENERIC=y
 244 +CONFIG_USB_DWC3=y
 245 +CONFIG_USB_DWC3_GENERIC=y
 246 +CONFIG_SPL_TINY_MEMSET=y
 247 +CONFIG_TPL_TINY_MEMSET=y
 248 +CONFIG_ERRNO_STR=y