5148f444dc1b3ea583d835a2d8b626a48fdd639d
[openwrt/staging/ldir.git] /
1 From 6506f95ad4d47500275c2f3a48abb7f3de11c54b Mon Sep 17 00:00:00 2001
2 From: Roy Pledge <roy.pledge@nxp.com>
3 Date: Thu, 25 May 2017 16:59:08 -0400
4 Subject: [PATCH] fsl_qbman/usdpaa: Invalidate software portals before use
5
6 Invalidate the cache for the software portals before using them
7 since the portals are non coherent. This ensures that the core
8 using the portal is seeing the most up to date information in
9 case the cache contained older data. This is important during
10 the cleanup phase if cleanup occurs on a differnt core than
11 what the application was using.
12
13 Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
14 ---
15 drivers/staging/fsl_qbman/fsl_usdpaa.c | 24 ++++++++++++++++++++++++
16 1 file changed, 24 insertions(+)
17
18 --- a/drivers/staging/fsl_qbman/fsl_usdpaa.c
19 +++ b/drivers/staging/fsl_qbman/fsl_usdpaa.c
20 @@ -371,6 +371,16 @@ static int usdpaa_open(struct inode *ino
21
22 #define DQRR_MAXFILL 15
23
24 +
25 +/* Invalidate a portal */
26 +void dbci_portal(void *addr)
27 +{
28 + int i;
29 +
30 + for (i = 0; i < 0x4000; i += 64)
31 + dcbi(addr + i);
32 +}
33 +
34 /* Reset a QMan portal to its default state */
35 static int init_qm_portal(struct qm_portal_config *config,
36 struct qm_portal *portal)
37 @@ -384,6 +394,13 @@ static int init_qm_portal(struct qm_port
38 /* Make sure interrupts are inhibited */
39 qm_out(IIR, 1);
40
41 + /*
42 + * Invalidate the entire CE portal are to ensure no stale
43 + * cachelines are present. This should be done on all
44 + * cores as the portal is mapped as M=0 (non-coherent).
45 + */
46 + on_each_cpu(dbci_portal, portal->addr.addr_ce, 1);
47 +
48 /* Initialize the DQRR. This will stop any dequeue
49 commands that are in progress */
50 if (qm_dqrr_init(portal, config, qm_dqrr_dpush, qm_dqrr_pvb,
51 @@ -435,6 +452,13 @@ static int init_bm_portal(struct bm_port
52 portal->addr.addr_ce = config->addr_virt[DPA_PORTAL_CE];
53 portal->addr.addr_ci = config->addr_virt[DPA_PORTAL_CI];
54
55 + /*
56 + * Invalidate the entire CE portal are to ensure no stale
57 + * cachelines are present. This should be done on all
58 + * cores as the portal is mapped as M=0 (non-coherent).
59 + */
60 + on_each_cpu(dbci_portal, portal->addr.addr_ce, 1);
61 +
62 if (bm_rcr_init(portal, bm_rcr_pvb, bm_rcr_cce)) {
63 pr_err("Bman RCR initialisation failed\n");
64 return 1;